sam4e_eth_driver.h
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1 /**
2  * @file sam4e_eth_driver.h
3  * @brief SAM4E Ethernet MAC controller
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _SAM4E_ETH_DRIVER_H
30 #define _SAM4E_ETH_DRIVER_H
31 
32 //Number of TX buffers
33 #ifndef SAM4E_ETH_TX_BUFFER_COUNT
34  #define SAM4E_ETH_TX_BUFFER_COUNT 2
35 #elif (SAM4E_ETH_TX_BUFFER_COUNT < 1)
36  #error SAM4E_ETH_TX_BUFFER_COUNT parameter is not valid
37 #endif
38 
39 //TX buffer size
40 #ifndef SAM4E_ETH_TX_BUFFER_SIZE
41  #define SAM4E_ETH_TX_BUFFER_SIZE 1536
42 #elif (SAM4E_ETH_TX_BUFFER_SIZE != 1536)
43  #error SAM4E_ETH_TX_BUFFER_SIZE parameter is not valid
44 #endif
45 
46 //Number of RX buffers
47 #ifndef SAM4E_ETH_RX_BUFFER_COUNT
48  #define SAM4E_ETH_RX_BUFFER_COUNT 48
49 #elif (SAM4E_ETH_RX_BUFFER_COUNT < 12)
50  #error SAM4E_ETH_RX_BUFFER_COUNT parameter is not valid
51 #endif
52 
53 //RX buffer size
54 #ifndef SAM4E_ETH_RX_BUFFER_SIZE
55  #define SAM4E_ETH_RX_BUFFER_SIZE 128
56 #elif (SAM4E_ETH_RX_BUFFER_SIZE != 128)
57  #error SAM4E_ETH_RX_BUFFER_SIZE parameter is not valid
58 #endif
59 
60 //Interrupt priority grouping
61 #ifndef SAM4E_ETH_IRQ_PRIORITY_GROUPING
62  #define SAM4E_ETH_IRQ_PRIORITY_GROUPING 3
63 #elif (SAM4E_ETH_IRQ_PRIORITY_GROUPING < 0)
64  #error SAM4E_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
65 #endif
66 
67 //Ethernet interrupt group priority
68 #ifndef SAM4E_ETH_IRQ_GROUP_PRIORITY
69  #define SAM4E_ETH_IRQ_GROUP_PRIORITY 12
70 #elif (SAM4E_ETH_IRQ_GROUP_PRIORITY < 0)
71  #error SAM4E_ETH_IRQ_GROUP_PRIORITY parameter is not valid
72 #endif
73 
74 //Ethernet interrupt subpriority
75 #ifndef SAM4E_ETH_IRQ_SUB_PRIORITY
76  #define SAM4E_ETH_IRQ_SUB_PRIORITY 0
77 #elif (SAM4E_ETH_IRQ_SUB_PRIORITY < 0)
78  #error SAM4E_ETH_IRQ_SUB_PRIORITY parameter is not valid
79 #endif
80 
81 //Legacy definitions
82 #ifndef PIO_PD6A_GRX1
83  #define PIO_PD6A_GRX1 PIO_PD6A_GRX0
84 #endif
85 
86 //MII signals
87 #define GMAC_MII_MASK (PIO_PD16A_GTX3 | \
88  PIO_PD15A_GTX2 | PIO_PD14A_GRXCK | PIO_PD13A_GCOL | PIO_PD12A_GRX3 | \
89  PIO_PD11A_GRX2 | PIO_PD10A_GCRS | PIO_PD9A_GMDIO | PIO_PD8A_GMDC | \
90  PIO_PD7A_GRXER | PIO_PD6A_GRX1 | PIO_PD5A_GRX0 | PIO_PD4A_GRXDV | \
91  PIO_PD3A_GTX1 | PIO_PD2A_GTX0 | PIO_PD1A_GTXEN | PIO_PD0A_GTXCK)
92 
93 //TX buffer descriptor flags
94 #define GMAC_TX_USED 0x80000000
95 #define GMAC_TX_WRAP 0x40000000
96 #define GMAC_TX_RLE_ERROR 0x20000000
97 #define GMAC_TX_UNDERRUN_ERROR 0x10000000
98 #define GMAC_TX_AHB_ERROR 0x08000000
99 #define GMAC_TX_LATE_COL_ERROR 0x04000000
100 #define GMAC_TX_CHECKSUM_ERROR 0x00700000
101 #define GMAC_TX_NO_CRC 0x00010000
102 #define GMAC_TX_LAST 0x00008000
103 #define GMAC_TX_LENGTH 0x00003FFF
104 
105 //RX buffer descriptor flags
106 #define GMAC_RX_ADDRESS 0xFFFFFFFC
107 #define GMAC_RX_WRAP 0x00000002
108 #define GMAC_RX_OWNERSHIP 0x00000001
109 #define GMAC_RX_BROADCAST 0x80000000
110 #define GMAC_RX_MULTICAST_HASH 0x40000000
111 #define GMAC_RX_UNICAST_HASH 0x20000000
112 #define GMAC_RX_SAR 0x08000000
113 #define GMAC_RX_SAR_MASK 0x06000000
114 #define GMAC_RX_TYPE_ID 0x01000000
115 #define GMAC_RX_SNAP 0x01000000
116 #define GMAC_RX_TYPE_ID_MASK 0x00C00000
117 #define GMAC_RX_CHECKSUM_VALID 0x00C00000
118 #define GMAC_RX_VLAN_TAG 0x00200000
119 #define GMAC_RX_PRIORITY_TAG 0x00100000
120 #define GMAC_RX_VLAN_PRIORITY 0x000E0000
121 #define GMAC_RX_CFI 0x00010000
122 #define GMAC_RX_EOF 0x00008000
123 #define GMAC_RX_SOF 0x00004000
124 #define GMAC_RX_LENGTH_MSB 0x00002000
125 #define GMAC_RX_BAD_FCS 0x00002000
126 #define GMAC_RX_LENGTH 0x00001FFF
127 
128 //C++ guard
129 #ifdef __cplusplus
130  extern "C" {
131 #endif
132 
133 
134 /**
135  * @brief Transmit buffer descriptor
136  **/
137 
138 typedef struct
139 {
140  uint32_t address;
141  uint32_t status;
143 
144 
145 /**
146  * @brief Receive buffer descriptor
147  **/
148 
149 typedef struct
150 {
151  uint32_t address;
152  uint32_t status;
154 
155 
156 //SAM4E Ethernet MAC driver
157 extern const NicDriver sam4eEthDriver;
158 
159 //SAM4E Ethernet MAC related functions
160 error_t sam4eEthInit(NetInterface *interface);
161 void sam4eEthInitGpio(NetInterface *interface);
162 void sam4eEthInitBufferDesc(NetInterface *interface);
163 
164 void sam4eEthTick(NetInterface *interface);
165 
166 void sam4eEthEnableIrq(NetInterface *interface);
167 void sam4eEthDisableIrq(NetInterface *interface);
168 void sam4eEthEventHandler(NetInterface *interface);
169 
171  const NetBuffer *buffer, size_t offset);
172 
174 
177 
178 void sam4eEthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
179 uint16_t sam4eEthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
180 
181 //C++ guard
182 #ifdef __cplusplus
183  }
184 #endif
185 
186 #endif
void sam4eEthEventHandler(NetInterface *interface)
SAM4E Ethernet MAC event handler.
error_t sam4eEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
void sam4eEthTick(NetInterface *interface)
SAM4E Ethernet MAC timer handler.
void sam4eEthEnableIrq(NetInterface *interface)
Enable interrupts.
error_t sam4eEthInit(NetInterface *interface)
SAM4E Ethernet MAC initialization.
const NicDriver sam4eEthDriver
SAM4E Ethernet MAC driver.
void sam4eEthInitGpio(NetInterface *interface)
NIC driver.
Definition: nic.h:161
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:86
void sam4eEthDisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t regAddr
uint16_t sam4eEthReadPhyReg(uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
error_t sam4eEthReceivePacket(NetInterface *interface)
Receive a packet.
error_t sam4eEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
error_t sam4eEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
error_t
Error codes.
Definition: error.h:40
Transmit buffer descriptor.
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
void sam4eEthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
Receive buffer descriptor.
void sam4eEthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.