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31 #ifndef _SAM7X_ETH_DRIVER_H
32 #define _SAM7X_ETH_DRIVER_H
35 #ifndef SAM7X_ETH_TX_BUFFER_COUNT
36 #define SAM7X_ETH_TX_BUFFER_COUNT 2
37 #elif (SAM7X_ETH_TX_BUFFER_COUNT < 1)
38 #error SAM7X_ETH_TX_BUFFER_COUNT parameter is not valid
42 #ifndef SAM7X_ETH_TX_BUFFER_SIZE
43 #define SAM7X_ETH_TX_BUFFER_SIZE 1536
44 #elif (SAM7X_ETH_TX_BUFFER_SIZE != 1536)
45 #error SAM7X_ETH_TX_BUFFER_SIZE parameter is not valid
49 #ifndef SAM7X_ETH_RX_BUFFER_COUNT
50 #define SAM7X_ETH_RX_BUFFER_COUNT 48
51 #elif (SAM7X_ETH_RX_BUFFER_COUNT < 12)
52 #error SAM7X_ETH_RX_BUFFER_COUNT parameter is not valid
56 #ifndef SAM7X_ETH_RX_BUFFER_SIZE
57 #define SAM7X_ETH_RX_BUFFER_SIZE 128
58 #elif (SAM7X_ETH_RX_BUFFER_SIZE != 128)
59 #error SAM7X_ETH_RX_BUFFER_SIZE parameter is not valid
63 #define AT91C_EMAC_MII_MASK (AT91C_PB17_ERXCK | AT91C_PB16_ECOL | \
64 AT91C_PB15_ERXDV_ECRSDV | AT91C_PB14_ERX3 | AT91C_PB13_ERX2 | AT91C_PB12_ETXER | \
65 AT91C_PB11_ETX3 | AT91C_PB10_ETX2 | AT91C_PB9_EMDIO | AT91C_PB8_EMDC | \
66 AT91C_PB7_ERXER | AT91C_PB6_ERX1 | AT91C_PB5_ERX0 | AT91C_PB4_ECRS | \
67 AT91C_PB3_ETX1 | AT91C_PB2_ETX0 | AT91C_PB1_ETXEN | AT91C_PB0_ETXCK_EREFCK)
70 #define AT91C_EMAC_SOF_01 (1 << 30)
71 #define AT91C_EMAC_RW_01 (1 << 28)
72 #define AT91C_EMAC_RW_10 (2 << 28)
73 #define AT91C_EMAC_CODE_10 (2 << 16)
76 #define AT91C_EMAC_TX_USED 0x80000000
77 #define AT91C_EMAC_TX_WRAP 0x40000000
78 #define AT91C_EMAC_TX_ERROR 0x20000000
79 #define AT91C_EMAC_TX_UNDERRUN 0x10000000
80 #define AT91C_EMAC_TX_EXHAUSTED 0x08000000
81 #define AT91C_EMAC_TX_NO_CRC 0x00010000
82 #define AT91C_EMAC_TX_LAST 0x00008000
83 #define AT91C_EMAC_TX_LENGTH 0x000007FF
86 #define AT91C_EMAC_RX_ADDRESS 0xFFFFFFFC
87 #define AT91C_EMAC_RX_WRAP 0x00000002
88 #define AT91C_EMAC_RX_OWNERSHIP 0x00000001
89 #define AT91C_EMAC_RX_BROADCAST 0x80000000
90 #define AT91C_EMAC_RX_MULTICAST_HASH 0x40000000
91 #define AT91C_EMAC_RX_UNICAST_HASH 0x20000000
92 #define AT91C_EMAC_RX_EXT_ADDR 0x10000000
93 #define AT91C_EMAC_RX_SAR1 0x04000000
94 #define AT91C_EMAC_RX_SAR2 0x02000000
95 #define AT91C_EMAC_RX_SAR3 0x01000000
96 #define AT91C_EMAC_RX_SAR4 0x00800000
97 #define AT91C_EMAC_RX_TYPE_ID 0x00400000
98 #define AT91C_EMAC_RX_VLAN_TAG 0x00200000
99 #define AT91C_EMAC_RX_PRIORITY_TAG 0x00100000
100 #define AT91C_EMAC_RX_VLAN_PRIORITY 0x000E0000
101 #define AT91C_EMAC_RX_CFI 0x00010000
102 #define AT91C_EMAC_RX_EOF 0x00008000
103 #define AT91C_EMAC_RX_SOF 0x00004000
104 #define AT91C_EMAC_RX_OFFSET 0x00003000
105 #define AT91C_EMAC_RX_LENGTH 0x00000FFF
void sam7xEthIrqHandler(void)
SAM7X Ethernet MAC interrupt service routine.
Structure describing a buffer that spans multiple chunks.
void emacIrqWrapper(void)
void sam7xEthEnableIrq(NetInterface *interface)
Enable interrupts.
error_t sam7xEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
Transmit buffer descriptor.
error_t sam7xEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
Receive buffer descriptor.
void sam7xEthTick(NetInterface *interface)
SAM7X Ethernet MAC timer handler.
void sam7xEthInitGpio(NetInterface *interface)
GPIO configuration.
const NicDriver sam7xEthDriver
SAM7X Ethernet MAC driver.
void sam7xEthDisableIrq(NetInterface *interface)
Disable interrupts.
error_t sam7xEthInit(NetInterface *interface)
SAM7X Ethernet MAC initialization.
void sam7xEthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
uint16_t sam7xEthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void sam7xEthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
error_t sam7xEthReceivePacket(NetInterface *interface)
Receive a packet.
error_t sam7xEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
void sam7xEthEventHandler(NetInterface *interface)
SAM7X Ethernet MAC event handler.