sama5d2_eth_driver.h
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1 /**
2  * @file sama5d2_eth_driver.h
3  * @brief SAMA5D2 Ethernet MAC driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2020 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.8
29  **/
30 
31 #ifndef _SAMA5D2_ETH_DRIVER_H
32 #define _SAMA5D2_ETH_DRIVER_H
33 
34 //Number of TX buffers
35 #ifndef SAMA5D2_ETH_TX_BUFFER_COUNT
36  #define SAMA5D2_ETH_TX_BUFFER_COUNT 4
37 #elif (SAMA5D2_ETH_TX_BUFFER_COUNT < 1)
38  #error SAMA5D2_ETH_TX_BUFFER_COUNT parameter is not valid
39 #endif
40 
41 //TX buffer size
42 #ifndef SAMA5D2_ETH_TX_BUFFER_SIZE
43  #define SAMA5D2_ETH_TX_BUFFER_SIZE 1536
44 #elif (SAMA5D2_ETH_TX_BUFFER_SIZE != 1536)
45  #error SAMA5D2_ETH_TX_BUFFER_SIZE parameter is not valid
46 #endif
47 
48 //Number of RX buffers
49 #ifndef SAMA5D2_ETH_RX_BUFFER_COUNT
50  #define SAMA5D2_ETH_RX_BUFFER_COUNT 96
51 #elif (SAMA5D2_ETH_RX_BUFFER_COUNT < 12)
52  #error SAMA5D2_ETH_RX_BUFFER_COUNT parameter is not valid
53 #endif
54 
55 //RX buffer size
56 #ifndef SAMA5D2_ETH_RX_BUFFER_SIZE
57  #define SAMA5D2_ETH_RX_BUFFER_SIZE 128
58 #elif (SAMA5D2_ETH_RX_BUFFER_SIZE != 128)
59  #error SAMA5D2_ETH_RX_BUFFER_SIZE parameter is not valid
60 #endif
61 
62 //Number of dummy buffers
63 #ifndef SAMA5D2_ETH_DUMMY_BUFFER_COUNT
64  #define SAMA5D2_ETH_DUMMY_BUFFER_COUNT 2
65 #elif (SAMA5D2_ETH_DUMMY_BUFFER_COUNT < 1)
66  #error SAMA5D2_ETH_DUMMY_BUFFER_COUNT parameter is not valid
67 #endif
68 
69 //Dummy buffer size
70 #ifndef SAMA5D2_ETH_DUMMY_BUFFER_SIZE
71  #define SAMA5D2_ETH_DUMMY_BUFFER_SIZE 128
72 #elif (SAMA5D2_ETH_DUMMY_BUFFER_SIZE != 128)
73  #error SAMA5D2_ETH_DUMMY_BUFFER_SIZE parameter is not valid
74 #endif
75 
76 //Ethernet interrupt priority
77 #ifndef SAMA5D2_ETH_IRQ_PRIORITY
78  #define SAMA5D2_ETH_IRQ_PRIORITY 0
79 #elif (SAMA5D2_ETH_IRQ_PRIORITY < 0)
80  #error SAMA5D2_ETH_IRQ_PRIORITY parameter is not valid
81 #endif
82 
83 //Name of the section where to place DMA buffers
84 #ifndef SAMA5D2_ETH_RAM_SECTION
85  #define SAMA5D2_ETH_RAM_SECTION ".region_ddr_nocache"
86 #endif
87 
88 //TX buffer descriptor flags
89 #define GMAC_TX_USED 0x80000000
90 #define GMAC_TX_WRAP 0x40000000
91 #define GMAC_TX_RLE_ERROR 0x20000000
92 #define GMAC_TX_UNDERRUN_ERROR 0x10000000
93 #define GMAC_TX_AHB_ERROR 0x08000000
94 #define GMAC_TX_LATE_COL_ERROR 0x04000000
95 #define GMAC_TX_CHECKSUM_ERROR 0x00700000
96 #define GMAC_TX_NO_CRC 0x00010000
97 #define GMAC_TX_LAST 0x00008000
98 #define GMAC_TX_LENGTH 0x00003FFF
99 
100 //RX buffer descriptor flags
101 #define GMAC_RX_ADDRESS 0xFFFFFFFC
102 #define GMAC_RX_WRAP 0x00000002
103 #define GMAC_RX_OWNERSHIP 0x00000001
104 #define GMAC_RX_BROADCAST 0x80000000
105 #define GMAC_RX_MULTICAST_HASH 0x40000000
106 #define GMAC_RX_UNICAST_HASH 0x20000000
107 #define GMAC_RX_SAR 0x08000000
108 #define GMAC_RX_SAR_MASK 0x06000000
109 #define GMAC_RX_TYPE_ID 0x01000000
110 #define GMAC_RX_SNAP 0x01000000
111 #define GMAC_RX_TYPE_ID_MASK 0x00C00000
112 #define GMAC_RX_CHECKSUM_VALID 0x00C00000
113 #define GMAC_RX_VLAN_TAG 0x00200000
114 #define GMAC_RX_PRIORITY_TAG 0x00100000
115 #define GMAC_RX_VLAN_PRIORITY 0x000E0000
116 #define GMAC_RX_CFI 0x00010000
117 #define GMAC_RX_EOF 0x00008000
118 #define GMAC_RX_SOF 0x00004000
119 #define GMAC_RX_LENGTH_MSB 0x00002000
120 #define GMAC_RX_BAD_FCS 0x00002000
121 #define GMAC_RX_LENGTH 0x00001FFF
122 
123 //C++ guard
124 #ifdef __cplusplus
125 extern "C" {
126 #endif
127 
128 
129 /**
130  * @brief Transmit buffer descriptor
131  **/
132 
133 typedef struct
134 {
135  uint32_t address;
136  uint32_t status;
138 
139 
140 /**
141  * @brief Receive buffer descriptor
142  **/
143 
144 typedef struct
145 {
146  uint32_t address;
147  uint32_t status;
149 
150 
151 //SAMA5D2 Ethernet MAC driver
152 extern const NicDriver sama5d2EthDriver;
153 
154 //SAMA5D2 Ethernet MAC related functions
156 void sama5d2EthInitGpio(NetInterface *interface);
157 void sama5d2EthInitBufferDesc(NetInterface *interface);
158 
159 void sama5d2EthTick(NetInterface *interface);
160 
161 void sama5d2EthEnableIrq(NetInterface *interface);
162 void sama5d2EthDisableIrq(NetInterface *interface);
163 void sama5d2EthIrqHandler(void);
164 void sama5d2EthEventHandler(NetInterface *interface);
165 
167  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
168 
170 
173 
174 void sama5d2EthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
175  uint8_t regAddr, uint16_t data);
176 
177 uint16_t sama5d2EthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
178  uint8_t regAddr);
179 
180 //C++ guard
181 #ifdef __cplusplus
182 }
183 #endif
184 
185 #endif
uint8_t opcode
Definition: dns_common.h:172
error_t sama5d2EthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
void sama5d2EthDisableIrq(NetInterface *interface)
Disable interrupts.
uint8_t data[]
Definition: ethernet.h:209
void sama5d2EthEventHandler(NetInterface *interface)
SAMA5D2 Ethernet MAC event handler.
error_t sama5d2EthReceivePacket(NetInterface *interface)
Receive a packet.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
Receive buffer descriptor.
Transmit buffer descriptor.
void sama5d2EthEnableIrq(NetInterface *interface)
Enable interrupts.
void sama5d2EthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
error_t
Error codes.
Definition: error.h:42
uint16_t sama5d2EthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
#define NetInterface
Definition: net.h:36
const NicDriver sama5d2EthDriver
SAMA5D2 Ethernet MAC driver.
void sama5d2EthInitGpio(NetInterface *interface)
#define NetTxAncillary
Definition: net_misc.h:36
error_t sama5d2EthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
uint16_t regAddr
error_t sama5d2EthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
error_t sama5d2EthInit(NetInterface *interface)
SAMA5D2 Ethernet MAC initialization.
void sama5d2EthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
void sama5d2EthIrqHandler(void)
SAMA5D2 Ethernet MAC interrupt service routine.
void sama5d2EthTick(NetInterface *interface)
SAMA5D2 Ethernet MAC timer handler.
NIC driver.
Definition: nic.h:257