sama5d2_eth_driver.h
Go to the documentation of this file.
1 /**
2  * @file sama5d2_eth_driver.h
3  * @brief SAMA5D2 Ethernet MAC controller
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _SAMA5D2_ETH_DRIVER_H
30 #define _SAMA5D2_ETH_DRIVER_H
31 
32 //Number of TX buffers
33 #ifndef SAMA5D2_ETH_TX_BUFFER_COUNT
34  #define SAMA5D2_ETH_TX_BUFFER_COUNT 4
35 #elif (SAMA5D2_ETH_TX_BUFFER_COUNT < 1)
36  #error SAMA5D2_ETH_TX_BUFFER_COUNT parameter is not valid
37 #endif
38 
39 //TX buffer size
40 #ifndef SAMA5D2_ETH_TX_BUFFER_SIZE
41  #define SAMA5D2_ETH_TX_BUFFER_SIZE 1536
42 #elif (SAMA5D2_ETH_TX_BUFFER_SIZE != 1536)
43  #error SAMA5D2_ETH_TX_BUFFER_SIZE parameter is not valid
44 #endif
45 
46 //Number of RX buffers
47 #ifndef SAMA5D2_ETH_RX_BUFFER_COUNT
48  #define SAMA5D2_ETH_RX_BUFFER_COUNT 96
49 #elif (SAMA5D2_ETH_RX_BUFFER_COUNT < 12)
50  #error SAMA5D2_ETH_RX_BUFFER_COUNT parameter is not valid
51 #endif
52 
53 //RX buffer size
54 #ifndef SAMA5D2_ETH_RX_BUFFER_SIZE
55  #define SAMA5D2_ETH_RX_BUFFER_SIZE 128
56 #elif (SAMA5D2_ETH_RX_BUFFER_SIZE != 128)
57  #error SAMA5D2_ETH_RX_BUFFER_SIZE parameter is not valid
58 #endif
59 
60 //Number of dummy buffers
61 #ifndef SAMA5D2_ETH_DUMMY_BUFFER_COUNT
62  #define SAMA5D2_ETH_DUMMY_BUFFER_COUNT 2
63 #elif (SAMA5D2_ETH_DUMMY_BUFFER_COUNT < 1)
64  #error SAMA5D2_ETH_DUMMY_BUFFER_COUNT parameter is not valid
65 #endif
66 
67 //Dummy buffer size
68 #ifndef SAMA5D2_ETH_DUMMY_BUFFER_SIZE
69  #define SAMA5D2_ETH_DUMMY_BUFFER_SIZE 128
70 #elif (SAMA5D2_ETH_DUMMY_BUFFER_SIZE != 128)
71  #error SAMA5D2_ETH_DUMMY_BUFFER_SIZE parameter is not valid
72 #endif
73 
74 //Ethernet interrupt priority
75 #ifndef SAMA5D2_ETH_IRQ_PRIORITY
76  #define SAMA5D2_ETH_IRQ_PRIORITY 0
77 #elif (SAMA5D2_ETH_IRQ_PRIORITY < 0)
78  #error SAMA5D2_ETH_IRQ_PRIORITY parameter is not valid
79 #endif
80 
81 //TX buffer descriptor flags
82 #define GMAC_TX_USED 0x80000000
83 #define GMAC_TX_WRAP 0x40000000
84 #define GMAC_TX_RLE_ERROR 0x20000000
85 #define GMAC_TX_UNDERRUN_ERROR 0x10000000
86 #define GMAC_TX_AHB_ERROR 0x08000000
87 #define GMAC_TX_LATE_COL_ERROR 0x04000000
88 #define GMAC_TX_CHECKSUM_ERROR 0x00700000
89 #define GMAC_TX_NO_CRC 0x00010000
90 #define GMAC_TX_LAST 0x00008000
91 #define GMAC_TX_LENGTH 0x00003FFF
92 
93 //RX buffer descriptor flags
94 #define GMAC_RX_ADDRESS 0xFFFFFFFC
95 #define GMAC_RX_WRAP 0x00000002
96 #define GMAC_RX_OWNERSHIP 0x00000001
97 #define GMAC_RX_BROADCAST 0x80000000
98 #define GMAC_RX_MULTICAST_HASH 0x40000000
99 #define GMAC_RX_UNICAST_HASH 0x20000000
100 #define GMAC_RX_SAR 0x08000000
101 #define GMAC_RX_SAR_MASK 0x06000000
102 #define GMAC_RX_TYPE_ID 0x01000000
103 #define GMAC_RX_SNAP 0x01000000
104 #define GMAC_RX_TYPE_ID_MASK 0x00C00000
105 #define GMAC_RX_CHECKSUM_VALID 0x00C00000
106 #define GMAC_RX_VLAN_TAG 0x00200000
107 #define GMAC_RX_PRIORITY_TAG 0x00100000
108 #define GMAC_RX_VLAN_PRIORITY 0x000E0000
109 #define GMAC_RX_CFI 0x00010000
110 #define GMAC_RX_EOF 0x00008000
111 #define GMAC_RX_SOF 0x00004000
112 #define GMAC_RX_LENGTH_MSB 0x00002000
113 #define GMAC_RX_BAD_FCS 0x00002000
114 #define GMAC_RX_LENGTH 0x00001FFF
115 
116 //C++ guard
117 #ifdef __cplusplus
118  extern "C" {
119 #endif
120 
121 
122 /**
123  * @brief Transmit buffer descriptor
124  **/
125 
126 typedef struct
127 {
128  uint32_t address;
129  uint32_t status;
131 
132 
133 /**
134  * @brief Receive buffer descriptor
135  **/
136 
137 typedef struct
138 {
139  uint32_t address;
140  uint32_t status;
142 
143 
144 //SAMA5D2 Ethernet MAC driver
145 extern const NicDriver sama5d2EthDriver;
146 
147 //SAMA5D2 Ethernet MAC related functions
149 void sama5d2EthInitGpio(NetInterface *interface);
150 void sama5d2EthInitBufferDesc(NetInterface *interface);
151 
152 void sama5d2EthTick(NetInterface *interface);
153 
154 void sama5d2EthEnableIrq(NetInterface *interface);
155 void sama5d2EthDisableIrq(NetInterface *interface);
156 void sama5d2EthIrqHandler(void);
157 void sama5d2EthEventHandler(NetInterface *interface);
158 
160  const NetBuffer *buffer, size_t offset);
161 
163 
166 
167 void sama5d2EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
168 uint16_t sama5d2EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
169 
170 //C++ guard
171 #ifdef __cplusplus
172  }
173 #endif
174 
175 #endif
void sama5d2EthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
error_t sama5d2EthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
void sama5d2EthInitGpio(NetInterface *interface)
void sama5d2EthDisableIrq(NetInterface *interface)
Disable interrupts.
void sama5d2EthEnableIrq(NetInterface *interface)
Enable interrupts.
const NicDriver sama5d2EthDriver
SAMA5D2 Ethernet MAC driver.
uint16_t sama5d2EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
error_t sama5d2EthReceivePacket(NetInterface *interface)
Receive a packet.
error_t sama5d2EthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
error_t sama5d2EthInit(NetInterface *interface)
SAMA5D2 Ethernet MAC initialization.
void sama5d2EthEventHandler(NetInterface *interface)
SAMA5D2 Ethernet MAC event handler.
NIC driver.
Definition: nic.h:161
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:86
uint16_t regAddr
error_t
Error codes.
Definition: error.h:40
Receive buffer descriptor.
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
void sama5d2EthTick(NetInterface *interface)
SAMA5D2 Ethernet MAC timer handler.
void sama5d2EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
Transmit buffer descriptor.
error_t sama5d2EthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
void sama5d2EthIrqHandler(void)
SAMA5D2 Ethernet MAC interrupt service routine.