STM32F1 Ethernet MAC driver. More...

#include "core/nic.h"

Data Structures
struct	Stm32f1xxTxDmaDesc
	Transmit DMA descriptor. More...

struct	Stm32f1xxRxDmaDesc
	Receive DMA descriptor. More...

Macros
#define	STM32F1XX_ETH_TX_BUFFER_COUNT 2

#define	STM32F1XX_ETH_TX_BUFFER_SIZE 1536

#define	STM32F1XX_ETH_RX_BUFFER_COUNT 4

#define	STM32F1XX_ETH_RX_BUFFER_SIZE 1536

#define	STM32F1XX_ETH_IRQ_PRIORITY_GROUPING 3

#define	STM32F1XX_ETH_IRQ_GROUP_PRIORITY 12

#define	STM32F1XX_ETH_IRQ_SUB_PRIORITY 0

#define	ETH_MACCR_RESERVED15 0x00008000

#define	ETH_TDES0_OWN 0x80000000

#define	ETH_TDES0_IC 0x40000000

#define	ETH_TDES0_LS 0x20000000

#define	ETH_TDES0_FS 0x10000000

#define	ETH_TDES0_DC 0x08000000

#define	ETH_TDES0_DP 0x04000000

#define	ETH_TDES0_TTSE 0x02000000

#define	ETH_TDES0_CIC 0x00C00000

#define	ETH_TDES0_TER 0x00200000

#define	ETH_TDES0_TCH 0x00100000

#define	ETH_TDES0_TTSS 0x00020000

#define	ETH_TDES0_IHE 0x00010000

#define	ETH_TDES0_ES 0x00008000

#define	ETH_TDES0_JT 0x00004000

#define	ETH_TDES0_FF 0x00002000

#define	ETH_TDES0_IPE 0x00001000

#define	ETH_TDES0_LCA 0x00000800

#define	ETH_TDES0_NC 0x00000400

#define	ETH_TDES0_LCO 0x00000200

#define	ETH_TDES0_EC 0x00000100

#define	ETH_TDES0_VF 0x00000080

#define	ETH_TDES0_CC 0x00000078

#define	ETH_TDES0_ED 0x00000004

#define	ETH_TDES0_UF 0x00000002

#define	ETH_TDES0_DB 0x00000001

#define	ETH_TDES1_TBS2 0x1FFF0000

#define	ETH_TDES1_TBS1 0x00001FFF

#define	ETH_TDES2_TBAP1 0xFFFFFFFF

#define	ETH_TDES3_TBAP2 0xFFFFFFFF

#define	ETH_RDES0_OWN 0x80000000

#define	ETH_RDES0_AFM 0x40000000

#define	ETH_RDES0_FL 0x3FFF0000

#define	ETH_RDES0_ES 0x00008000

#define	ETH_RDES0_DE 0x00004000

#define	ETH_RDES0_SAF 0x00002000

#define	ETH_RDES0_LE 0x00001000

#define	ETH_RDES0_OE 0x00000800

#define	ETH_RDES0_VLAN 0x00000400

#define	ETH_RDES0_FS 0x00000200

#define	ETH_RDES0_LS 0x00000100

#define	ETH_RDES0_IPHCE 0x00000080

#define	ETH_RDES0_LCO 0x00000040

#define	ETH_RDES0_FT 0x00000020

#define	ETH_RDES0_RWT 0x00000010

#define	ETH_RDES0_RE 0x00000008

#define	ETH_RDES0_DBE 0x00000004

#define	ETH_RDES0_CE 0x00000002

#define	ETH_RDES0_PCE 0x00000001

#define	ETH_RDES1_DIC 0x80000000

#define	ETH_RDES1_RBS2 0x1FFF0000

#define	ETH_RDES1_RER 0x00008000

#define	ETH_RDES1_RCH 0x00004000

#define	ETH_RDES1_RBS1 0x00001FFF

#define	ETH_RDES2_RBAP1 0xFFFFFFFF

#define	ETH_RDES3_RBAP2 0xFFFFFFFF

Functions
error_t	stm32f1xxEthInit (NetInterface *interface)
	STM32F1 Ethernet MAC initialization. More...

void	stm32f1xxEthInitGpio (NetInterface *interface)
	GPIO configuration. More...

void	stm32f1xxEthInitDmaDesc (NetInterface *interface)
	Initialize DMA descriptor lists. More...

void	stm32f1xxEthTick (NetInterface *interface)
	STM32F1 Ethernet MAC timer handler. More...

void	stm32f1xxEthEnableIrq (NetInterface *interface)
	Enable interrupts. More...

void	stm32f1xxEthDisableIrq (NetInterface *interface)
	Disable interrupts. More...

void	stm32f1xxEthEventHandler (NetInterface *interface)
	STM32F1 Ethernet MAC event handler. More...

error_t	stm32f1xxEthSendPacket (NetInterface interface, const NetBuffer buffer, size_t offset, NetTxAncillary *ancillary)
	Send a packet. More...

error_t	stm32f1xxEthReceivePacket (NetInterface *interface)
	Receive a packet. More...

error_t	stm32f1xxEthUpdateMacAddrFilter (NetInterface *interface)
	Configure MAC address filtering. More...

error_t	stm32f1xxEthUpdateMacConfig (NetInterface *interface)
	Adjust MAC configuration parameters for proper operation. More...

void	stm32f1xxEthWritePhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
	Write PHY register. More...

uint16_t	stm32f1xxEthReadPhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
	Read PHY register. More...

uint32_t	stm32f1xxEthCalcCrc (const void *data, size_t length)
	CRC calculation. More...

Variables
const NicDriver	stm32f1xxEthDriver
	STM32F1 Ethernet MAC driver. More...

Detailed Description

STM32F1 Ethernet MAC driver.

License

SPDX-License-Identifier: GPL-2.0-or-later

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author: Oryx Embedded SARL (www.oryx-embedded.com)

Version: 2.4.4

Definition in file stm32f1xx_eth_driver.h.

Macro Definition Documentation

◆ ETH_MACCR_RESERVED15

#define ETH_MACCR_RESERVED15 0x00008000

Definition at line 87 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_AFM

#define ETH_RDES0_AFM 0x40000000

Definition at line 122 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_CE

#define ETH_RDES0_CE 0x00000002

Definition at line 138 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_DBE

#define ETH_RDES0_DBE 0x00000004

Definition at line 137 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_DE

#define ETH_RDES0_DE 0x00004000

Definition at line 125 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_ES

#define ETH_RDES0_ES 0x00008000

Definition at line 124 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_FL

#define ETH_RDES0_FL 0x3FFF0000

Definition at line 123 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_FS

#define ETH_RDES0_FS 0x00000200

Definition at line 130 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_FT

#define ETH_RDES0_FT 0x00000020

Definition at line 134 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_IPHCE

#define ETH_RDES0_IPHCE 0x00000080

Definition at line 132 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_LCO

#define ETH_RDES0_LCO 0x00000040

Definition at line 133 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_LE

#define ETH_RDES0_LE 0x00001000

Definition at line 127 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_LS

#define ETH_RDES0_LS 0x00000100

Definition at line 131 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_OE

#define ETH_RDES0_OE 0x00000800

Definition at line 128 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_OWN

#define ETH_RDES0_OWN 0x80000000

Definition at line 121 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_PCE

#define ETH_RDES0_PCE 0x00000001

Definition at line 139 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_RE

#define ETH_RDES0_RE 0x00000008

Definition at line 136 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_RWT

#define ETH_RDES0_RWT 0x00000010

Definition at line 135 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_SAF

#define ETH_RDES0_SAF 0x00002000

Definition at line 126 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES0_VLAN

#define ETH_RDES0_VLAN 0x00000400

Definition at line 129 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES1_DIC

#define ETH_RDES1_DIC 0x80000000

Definition at line 140 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES1_RBS1

#define ETH_RDES1_RBS1 0x00001FFF

Definition at line 144 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES1_RBS2

#define ETH_RDES1_RBS2 0x1FFF0000

Definition at line 141 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES1_RCH

#define ETH_RDES1_RCH 0x00004000

Definition at line 143 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES1_RER

#define ETH_RDES1_RER 0x00008000

Definition at line 142 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES2_RBAP1

#define ETH_RDES2_RBAP1 0xFFFFFFFF

Definition at line 145 of file stm32f1xx_eth_driver.h.

◆ ETH_RDES3_RBAP2

#define ETH_RDES3_RBAP2 0xFFFFFFFF

Definition at line 146 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_CC

#define ETH_TDES0_CC 0x00000078

Definition at line 111 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_CIC

#define ETH_TDES0_CIC 0x00C00000

Definition at line 97 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_DB

#define ETH_TDES0_DB 0x00000001

Definition at line 114 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_DC

#define ETH_TDES0_DC 0x08000000

Definition at line 94 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_DP

#define ETH_TDES0_DP 0x04000000

Definition at line 95 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_EC

#define ETH_TDES0_EC 0x00000100

Definition at line 109 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_ED

#define ETH_TDES0_ED 0x00000004

Definition at line 112 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_ES

#define ETH_TDES0_ES 0x00008000

Definition at line 102 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_FF

#define ETH_TDES0_FF 0x00002000

Definition at line 104 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_FS

#define ETH_TDES0_FS 0x10000000

Definition at line 93 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_IC

#define ETH_TDES0_IC 0x40000000

Definition at line 91 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_IHE

#define ETH_TDES0_IHE 0x00010000

Definition at line 101 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_IPE

#define ETH_TDES0_IPE 0x00001000

Definition at line 105 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_JT

#define ETH_TDES0_JT 0x00004000

Definition at line 103 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_LCA

#define ETH_TDES0_LCA 0x00000800

Definition at line 106 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_LCO

#define ETH_TDES0_LCO 0x00000200

Definition at line 108 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_LS

#define ETH_TDES0_LS 0x20000000

Definition at line 92 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_NC

#define ETH_TDES0_NC 0x00000400

Definition at line 107 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_OWN

#define ETH_TDES0_OWN 0x80000000

Definition at line 90 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_TCH

#define ETH_TDES0_TCH 0x00100000

Definition at line 99 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_TER

#define ETH_TDES0_TER 0x00200000

Definition at line 98 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_TTSE

#define ETH_TDES0_TTSE 0x02000000

Definition at line 96 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_TTSS

#define ETH_TDES0_TTSS 0x00020000

Definition at line 100 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_UF

#define ETH_TDES0_UF 0x00000002

Definition at line 113 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES0_VF

#define ETH_TDES0_VF 0x00000080

Definition at line 110 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES1_TBS1

#define ETH_TDES1_TBS1 0x00001FFF

Definition at line 116 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES1_TBS2

#define ETH_TDES1_TBS2 0x1FFF0000

Definition at line 115 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES2_TBAP1

#define ETH_TDES2_TBAP1 0xFFFFFFFF

Definition at line 117 of file stm32f1xx_eth_driver.h.

◆ ETH_TDES3_TBAP2

#define ETH_TDES3_TBAP2 0xFFFFFFFF

Definition at line 118 of file stm32f1xx_eth_driver.h.

◆ STM32F1XX_ETH_IRQ_GROUP_PRIORITY

#define STM32F1XX_ETH_IRQ_GROUP_PRIORITY 12

Definition at line 74 of file stm32f1xx_eth_driver.h.

◆ STM32F1XX_ETH_IRQ_PRIORITY_GROUPING

#define STM32F1XX_ETH_IRQ_PRIORITY_GROUPING 3

Definition at line 67 of file stm32f1xx_eth_driver.h.

◆ STM32F1XX_ETH_IRQ_SUB_PRIORITY

#define STM32F1XX_ETH_IRQ_SUB_PRIORITY 0

Definition at line 81 of file stm32f1xx_eth_driver.h.

◆ STM32F1XX_ETH_RX_BUFFER_COUNT

#define STM32F1XX_ETH_RX_BUFFER_COUNT 4

Definition at line 53 of file stm32f1xx_eth_driver.h.

◆ STM32F1XX_ETH_RX_BUFFER_SIZE

#define STM32F1XX_ETH_RX_BUFFER_SIZE 1536

Definition at line 60 of file stm32f1xx_eth_driver.h.

◆ STM32F1XX_ETH_TX_BUFFER_COUNT

#define STM32F1XX_ETH_TX_BUFFER_COUNT 2

Definition at line 39 of file stm32f1xx_eth_driver.h.

◆ STM32F1XX_ETH_TX_BUFFER_SIZE

#define STM32F1XX_ETH_TX_BUFFER_SIZE 1536

Definition at line 46 of file stm32f1xx_eth_driver.h.

Function Documentation

◆ stm32f1xxEthCalcCrc()

uint32_t stm32f1xxEthCalcCrc	(	const void *	data,
		size_t	length
	)

CRC calculation.

Parameters

[in]	data	Pointer to the data over which to calculate the CRC
[in]	length	Number of bytes to process

Returns: Resulting CRC value

Definition at line 1026 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthDisableIrq()

void stm32f1xxEthDisableIrq ( NetInterface * interface )

Disable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 517 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthEnableIrq()

void stm32f1xxEthEnableIrq ( NetInterface * interface )

Enable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 489 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthEventHandler()

void stm32f1xxEthEventHandler ( NetInterface * interface )

STM32F1 Ethernet MAC event handler.

Parameters

[in] interface Underlying network interface

Definition at line 597 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthInit()

error_t stm32f1xxEthInit ( NetInterface * interface )

STM32F1 Ethernet MAC initialization.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 120 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthInitDmaDesc()

void stm32f1xxEthInitDmaDesc ( NetInterface * interface )

Initialize DMA descriptor lists.

Parameters

[in] interface Underlying network interface

Definition at line 408 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthInitGpio()

void stm32f1xxEthInitGpio ( NetInterface * interface )

GPIO configuration.

Parameters

[in] interface Underlying network interface

Definition at line 241 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthReadPhyReg()

uint16_t stm32f1xxEthReadPhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr
	)

Read PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)

Returns: Register value

Definition at line 980 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthReceivePacket()

error_t stm32f1xxEthReceivePacket ( NetInterface * interface )

Receive a packet.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 681 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthSendPacket()

error_t stm32f1xxEthSendPacket	(	NetInterface *	interface,
		const NetBuffer *	buffer,
		size_t	offset,
		NetTxAncillary *	ancillary
	)

Send a packet.

Parameters

[in]	interface	Underlying network interface
[in]	buffer	Multi-part buffer containing the data to send
[in]	offset	Offset to the first data byte
[in]	ancillary	Additional options passed to the stack along with the packet

Returns: Error code

Definition at line 622 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthTick()

void stm32f1xxEthTick ( NetInterface * interface )

STM32F1 Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters

[in] interface Underlying network interface

Definition at line 464 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthUpdateMacAddrFilter()

error_t stm32f1xxEthUpdateMacAddrFilter ( NetInterface * interface )

Configure MAC address filtering.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 751 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthUpdateMacConfig()

error_t stm32f1xxEthUpdateMacConfig ( NetInterface * interface )

Adjust MAC configuration parameters for proper operation.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 895 of file stm32f1xx_eth_driver.c.

◆ stm32f1xxEthWritePhyReg()

void stm32f1xxEthWritePhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr,
		uint16_t	data
	)

Write PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)
[in]	data	Register value

Definition at line 938 of file stm32f1xx_eth_driver.c.

Variable Documentation

◆ stm32f1xxEthDriver

const NicDriver stm32f1xxEthDriver

extern

STM32F1 Ethernet MAC driver.

Definition at line 93 of file stm32f1xx_eth_driver.c.

Data Structures

Macros

Functions

Variables

Detailed Description

License

Macro Definition Documentation

◆ ETH_MACCR_RESERVED15

◆ ETH_RDES0_AFM

◆ ETH_RDES0_CE

◆ ETH_RDES0_DBE

◆ ETH_RDES0_DE

◆ ETH_RDES0_ES

◆ ETH_RDES0_FL

◆ ETH_RDES0_FS

◆ ETH_RDES0_FT

◆ ETH_RDES0_IPHCE

◆ ETH_RDES0_LCO

◆ ETH_RDES0_LE

◆ ETH_RDES0_LS

◆ ETH_RDES0_OE

◆ ETH_RDES0_OWN

◆ ETH_RDES0_PCE

◆ ETH_RDES0_RE

◆ ETH_RDES0_RWT

◆ ETH_RDES0_SAF

◆ ETH_RDES0_VLAN

◆ ETH_RDES1_DIC

◆ ETH_RDES1_RBS1

◆ ETH_RDES1_RBS2

◆ ETH_RDES1_RCH

◆ ETH_RDES1_RER

◆ ETH_RDES2_RBAP1

◆ ETH_RDES3_RBAP2

◆ ETH_TDES0_CC

◆ ETH_TDES0_CIC

◆ ETH_TDES0_DB

◆ ETH_TDES0_DC

◆ ETH_TDES0_DP

◆ ETH_TDES0_EC

◆ ETH_TDES0_ED

◆ ETH_TDES0_ES

◆ ETH_TDES0_FF

◆ ETH_TDES0_FS

◆ ETH_TDES0_IC

◆ ETH_TDES0_IHE

◆ ETH_TDES0_IPE

◆ ETH_TDES0_JT

◆ ETH_TDES0_LCA

◆ ETH_TDES0_LCO

◆ ETH_TDES0_LS

◆ ETH_TDES0_NC

◆ ETH_TDES0_OWN

◆ ETH_TDES0_TCH

◆ ETH_TDES0_TER

◆ ETH_TDES0_TTSE

◆ ETH_TDES0_TTSS

◆ ETH_TDES0_UF

◆ ETH_TDES0_VF

◆ ETH_TDES1_TBS1

◆ ETH_TDES1_TBS2

◆ ETH_TDES2_TBAP1

◆ ETH_TDES3_TBAP2

◆ STM32F1XX_ETH_IRQ_GROUP_PRIORITY

◆ STM32F1XX_ETH_IRQ_PRIORITY_GROUPING

◆ STM32F1XX_ETH_IRQ_SUB_PRIORITY

◆ STM32F1XX_ETH_RX_BUFFER_COUNT

◆ STM32F1XX_ETH_RX_BUFFER_SIZE

◆ STM32F1XX_ETH_TX_BUFFER_COUNT

◆ STM32F1XX_ETH_TX_BUFFER_SIZE

Function Documentation

◆ stm32f1xxEthCalcCrc()

◆ stm32f1xxEthDisableIrq()

◆ stm32f1xxEthEnableIrq()

◆ stm32f1xxEthEventHandler()

◆ stm32f1xxEthInit()

◆ stm32f1xxEthInitDmaDesc()

◆ stm32f1xxEthInitGpio()

◆ stm32f1xxEthReadPhyReg()

◆ stm32f1xxEthReceivePacket()