stm32f7xx_eth_driver.h File Reference

STM32F746/756 Ethernet MAC controller. More...

#include "core/nic.h"

Go to the source code of this file.

Data Structures

struct  Stm32f7xxTxDmaDesc
 Enhanced TX DMA descriptor. More...
 
struct  Stm32f7xxRxDmaDesc
 Enhanced RX DMA descriptor. More...
 

Macros

#define STM32F7XX_ETH_TX_BUFFER_COUNT   3
 
#define STM32F7XX_ETH_TX_BUFFER_SIZE   1536
 
#define STM32F7XX_ETH_RX_BUFFER_COUNT   6
 
#define STM32F7XX_ETH_RX_BUFFER_SIZE   1536
 
#define STM32F7XX_ETH_IRQ_PRIORITY_GROUPING   3
 
#define STM32F7XX_ETH_IRQ_GROUP_PRIORITY   12
 
#define STM32F7XX_ETH_IRQ_SUB_PRIORITY   0
 
#define ETH_TDES0_OWN   0x80000000
 
#define ETH_TDES0_IC   0x40000000
 
#define ETH_TDES0_LS   0x20000000
 
#define ETH_TDES0_FS   0x10000000
 
#define ETH_TDES0_DC   0x08000000
 
#define ETH_TDES0_DP   0x04000000
 
#define ETH_TDES0_TTSE   0x02000000
 
#define ETH_TDES0_CIC   0x00C00000
 
#define ETH_TDES0_TER   0x00200000
 
#define ETH_TDES0_TCH   0x00100000
 
#define ETH_TDES0_TTSS   0x00020000
 
#define ETH_TDES0_IHE   0x00010000
 
#define ETH_TDES0_ES   0x00008000
 
#define ETH_TDES0_JT   0x00004000
 
#define ETH_TDES0_FF   0x00002000
 
#define ETH_TDES0_IPE   0x00001000
 
#define ETH_TDES0_LCA   0x00000800
 
#define ETH_TDES0_NC   0x00000400
 
#define ETH_TDES0_LCO   0x00000200
 
#define ETH_TDES0_EC   0x00000100
 
#define ETH_TDES0_VF   0x00000080
 
#define ETH_TDES0_CC   0x00000078
 
#define ETH_TDES0_ED   0x00000004
 
#define ETH_TDES0_UF   0x00000002
 
#define ETH_TDES0_DB   0x00000001
 
#define ETH_TDES1_TBS2   0x1FFF0000
 
#define ETH_TDES1_TBS1   0x00001FFF
 
#define ETH_TDES2_TBAP1   0xFFFFFFFF
 
#define ETH_TDES3_TBAP2   0xFFFFFFFF
 
#define ETH_TDES6_TTSL   0xFFFFFFFF
 
#define ETH_TDES7_TTSH   0xFFFFFFFF
 
#define ETH_RDES0_OWN   0x80000000
 
#define ETH_RDES0_AFM   0x40000000
 
#define ETH_RDES0_FL   0x3FFF0000
 
#define ETH_RDES0_ES   0x00008000
 
#define ETH_RDES0_DE   0x00004000
 
#define ETH_RDES0_SAF   0x00002000
 
#define ETH_RDES0_LE   0x00001000
 
#define ETH_RDES0_OE   0x00000800
 
#define ETH_RDES0_VLAN   0x00000400
 
#define ETH_RDES0_FS   0x00000200
 
#define ETH_RDES0_LS   0x00000100
 
#define ETH_RDES0_IPHCE   0x00000080
 
#define ETH_RDES0_LCO   0x00000040
 
#define ETH_RDES0_FT   0x00000020
 
#define ETH_RDES0_RWT   0x00000010
 
#define ETH_RDES0_RE   0x00000008
 
#define ETH_RDES0_DBE   0x00000004
 
#define ETH_RDES0_CE   0x00000002
 
#define ETH_RDES0_PCE   0x00000001
 
#define ETH_RDES1_DIC   0x80000000
 
#define ETH_RDES1_RBS2   0x1FFF0000
 
#define ETH_RDES1_RER   0x00008000
 
#define ETH_RDES1_RCH   0x00004000
 
#define ETH_RDES1_RBS1   0x00001FFF
 
#define ETH_RDES2_RBAP1   0xFFFFFFFF
 
#define ETH_RDES3_RBAP2   0xFFFFFFFF
 
#define ETH_RDES4_PV   0x00002000
 
#define ETH_RDES4_PFT   0x00001000
 
#define ETH_RDES4_PMT   0x00000F00
 
#define ETH_RDES4_IPV6PR   0x00000080
 
#define ETH_RDES4_IPV4PR   0x00000040
 
#define ETH_RDES4_IPCB   0x00000020
 
#define ETH_RDES4_IPPE   0x00000010
 
#define ETH_RDES4_IPHE   0x00000008
 
#define ETH_RDES4_IPPT   0x00000007
 
#define ETH_RDES6_RTSL   0xFFFFFFFF
 
#define ETH_RDES7_RTSH   0xFFFFFFFF
 
#define SMI_SYNC   0xFFFFFFFF
 
#define SMI_START   0x00000001
 
#define SMI_WRITE   0x00000001
 
#define SMI_READ   0x00000002
 
#define SMI_TA   0x00000002
 

Functions

error_t stm32f7xxEthInit (NetInterface *interface)
 STM32F746/756 Ethernet MAC initialization. More...
 
void stm32f7xxEthInitGpio (NetInterface *interface)
 
void stm32f7xxEthInitDmaDesc (NetInterface *interface)
 Initialize DMA descriptor lists. More...
 
void stm32f7xxEthTick (NetInterface *interface)
 STM32F746/756 Ethernet MAC timer handler. More...
 
void stm32f7xxEthEnableIrq (NetInterface *interface)
 Enable interrupts. More...
 
void stm32f7xxEthDisableIrq (NetInterface *interface)
 Disable interrupts. More...
 
void stm32f7xxEthEventHandler (NetInterface *interface)
 STM32F746/756 Ethernet MAC event handler. More...
 
error_t stm32f7xxEthSendPacket (NetInterface *interface, const NetBuffer *buffer, size_t offset)
 Send a packet. More...
 
error_t stm32f7xxEthReceivePacket (NetInterface *interface)
 Receive a packet. More...
 
error_t stm32f7xxEthUpdateMacAddrFilter (NetInterface *interface)
 Configure MAC address filtering. More...
 
error_t stm32f7xxEthUpdateMacConfig (NetInterface *interface)
 Adjust MAC configuration parameters for proper operation. More...
 
void stm32f7xxEthWritePhyReg (uint8_t phyAddr, uint8_t regAddr, uint16_t data)
 Write PHY register. More...
 
uint16_t stm32f7xxEthReadPhyReg (uint8_t phyAddr, uint8_t regAddr)
 Read PHY register. More...
 
void stm32f7xxEthWriteSmi (uint32_t data, uint_t length)
 SMI write operation. More...
 
uint32_t stm32f7xxEthReadSmi (uint_t length)
 SMI read operation. More...
 
uint32_t stm32f7xxEthCalcCrc (const void *data, size_t length)
 CRC calculation. More...
 

Variables

const NicDriver stm32f7xxEthDriver
 STM32F746/756 Ethernet MAC driver. More...
 

Detailed Description

STM32F746/756 Ethernet MAC controller.

License

Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author
Oryx Embedded SARL (www.oryx-embedded.com)
Version
1.9.0

Definition in file stm32f7xx_eth_driver.h.

Macro Definition Documentation

◆ ETH_RDES0_AFM

#define ETH_RDES0_AFM   0x40000000

Definition at line 119 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_CE

#define ETH_RDES0_CE   0x00000002

Definition at line 135 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_DBE

#define ETH_RDES0_DBE   0x00000004

Definition at line 134 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_DE

#define ETH_RDES0_DE   0x00004000

Definition at line 122 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_ES

#define ETH_RDES0_ES   0x00008000

Definition at line 121 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_FL

#define ETH_RDES0_FL   0x3FFF0000

Definition at line 120 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_FS

#define ETH_RDES0_FS   0x00000200

Definition at line 127 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_FT

#define ETH_RDES0_FT   0x00000020

Definition at line 131 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_IPHCE

#define ETH_RDES0_IPHCE   0x00000080

Definition at line 129 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_LCO

#define ETH_RDES0_LCO   0x00000040

Definition at line 130 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_LE

#define ETH_RDES0_LE   0x00001000

Definition at line 124 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_LS

#define ETH_RDES0_LS   0x00000100

Definition at line 128 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_OE

#define ETH_RDES0_OE   0x00000800

Definition at line 125 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_OWN

#define ETH_RDES0_OWN   0x80000000

Definition at line 118 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_PCE

#define ETH_RDES0_PCE   0x00000001

Definition at line 136 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_RE

#define ETH_RDES0_RE   0x00000008

Definition at line 133 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_RWT

#define ETH_RDES0_RWT   0x00000010

Definition at line 132 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_SAF

#define ETH_RDES0_SAF   0x00002000

Definition at line 123 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES0_VLAN

#define ETH_RDES0_VLAN   0x00000400

Definition at line 126 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES1_DIC

#define ETH_RDES1_DIC   0x80000000

Definition at line 137 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES1_RBS1

#define ETH_RDES1_RBS1   0x00001FFF

Definition at line 141 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES1_RBS2

#define ETH_RDES1_RBS2   0x1FFF0000

Definition at line 138 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES1_RCH

#define ETH_RDES1_RCH   0x00004000

Definition at line 140 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES1_RER

#define ETH_RDES1_RER   0x00008000

Definition at line 139 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES2_RBAP1

#define ETH_RDES2_RBAP1   0xFFFFFFFF

Definition at line 142 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES3_RBAP2

#define ETH_RDES3_RBAP2   0xFFFFFFFF

Definition at line 143 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES4_IPCB

#define ETH_RDES4_IPCB   0x00000020

Definition at line 149 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES4_IPHE

#define ETH_RDES4_IPHE   0x00000008

Definition at line 151 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES4_IPPE

#define ETH_RDES4_IPPE   0x00000010

Definition at line 150 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES4_IPPT

#define ETH_RDES4_IPPT   0x00000007

Definition at line 152 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES4_IPV4PR

#define ETH_RDES4_IPV4PR   0x00000040

Definition at line 148 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES4_IPV6PR

#define ETH_RDES4_IPV6PR   0x00000080

Definition at line 147 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES4_PFT

#define ETH_RDES4_PFT   0x00001000

Definition at line 145 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES4_PMT

#define ETH_RDES4_PMT   0x00000F00

Definition at line 146 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES4_PV

#define ETH_RDES4_PV   0x00002000

Definition at line 144 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES6_RTSL

#define ETH_RDES6_RTSL   0xFFFFFFFF

Definition at line 153 of file stm32f7xx_eth_driver.h.

◆ ETH_RDES7_RTSH

#define ETH_RDES7_RTSH   0xFFFFFFFF

Definition at line 154 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_CC

#define ETH_TDES0_CC   0x00000078

Definition at line 106 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_CIC

#define ETH_TDES0_CIC   0x00C00000

Definition at line 92 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_DB

#define ETH_TDES0_DB   0x00000001

Definition at line 109 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_DC

#define ETH_TDES0_DC   0x08000000

Definition at line 89 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_DP

#define ETH_TDES0_DP   0x04000000

Definition at line 90 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_EC

#define ETH_TDES0_EC   0x00000100

Definition at line 104 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_ED

#define ETH_TDES0_ED   0x00000004

Definition at line 107 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_ES

#define ETH_TDES0_ES   0x00008000

Definition at line 97 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_FF

#define ETH_TDES0_FF   0x00002000

Definition at line 99 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_FS

#define ETH_TDES0_FS   0x10000000

Definition at line 88 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_IC

#define ETH_TDES0_IC   0x40000000

Definition at line 86 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_IHE

#define ETH_TDES0_IHE   0x00010000

Definition at line 96 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_IPE

#define ETH_TDES0_IPE   0x00001000

Definition at line 100 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_JT

#define ETH_TDES0_JT   0x00004000

Definition at line 98 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_LCA

#define ETH_TDES0_LCA   0x00000800

Definition at line 101 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_LCO

#define ETH_TDES0_LCO   0x00000200

Definition at line 103 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_LS

#define ETH_TDES0_LS   0x20000000

Definition at line 87 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_NC

#define ETH_TDES0_NC   0x00000400

Definition at line 102 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_OWN

#define ETH_TDES0_OWN   0x80000000

Definition at line 85 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_TCH

#define ETH_TDES0_TCH   0x00100000

Definition at line 94 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_TER

#define ETH_TDES0_TER   0x00200000

Definition at line 93 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_TTSE

#define ETH_TDES0_TTSE   0x02000000

Definition at line 91 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_TTSS

#define ETH_TDES0_TTSS   0x00020000

Definition at line 95 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_UF

#define ETH_TDES0_UF   0x00000002

Definition at line 108 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES0_VF

#define ETH_TDES0_VF   0x00000080

Definition at line 105 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES1_TBS1

#define ETH_TDES1_TBS1   0x00001FFF

Definition at line 111 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES1_TBS2

#define ETH_TDES1_TBS2   0x1FFF0000

Definition at line 110 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES2_TBAP1

#define ETH_TDES2_TBAP1   0xFFFFFFFF

Definition at line 112 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES3_TBAP2

#define ETH_TDES3_TBAP2   0xFFFFFFFF

Definition at line 113 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES6_TTSL

#define ETH_TDES6_TTSL   0xFFFFFFFF

Definition at line 114 of file stm32f7xx_eth_driver.h.

◆ ETH_TDES7_TTSH

#define ETH_TDES7_TTSH   0xFFFFFFFF

Definition at line 115 of file stm32f7xx_eth_driver.h.

◆ SMI_READ

#define SMI_READ   0x00000002

Definition at line 160 of file stm32f7xx_eth_driver.h.

◆ SMI_START

#define SMI_START   0x00000001

Definition at line 158 of file stm32f7xx_eth_driver.h.

◆ SMI_SYNC

#define SMI_SYNC   0xFFFFFFFF

Definition at line 157 of file stm32f7xx_eth_driver.h.

◆ SMI_TA

#define SMI_TA   0x00000002

Definition at line 161 of file stm32f7xx_eth_driver.h.

◆ SMI_WRITE

#define SMI_WRITE   0x00000001

Definition at line 159 of file stm32f7xx_eth_driver.h.

◆ STM32F7XX_ETH_IRQ_GROUP_PRIORITY

#define STM32F7XX_ETH_IRQ_GROUP_PRIORITY   12

Definition at line 72 of file stm32f7xx_eth_driver.h.

◆ STM32F7XX_ETH_IRQ_PRIORITY_GROUPING

#define STM32F7XX_ETH_IRQ_PRIORITY_GROUPING   3

Definition at line 65 of file stm32f7xx_eth_driver.h.

◆ STM32F7XX_ETH_IRQ_SUB_PRIORITY

#define STM32F7XX_ETH_IRQ_SUB_PRIORITY   0

Definition at line 79 of file stm32f7xx_eth_driver.h.

◆ STM32F7XX_ETH_RX_BUFFER_COUNT

#define STM32F7XX_ETH_RX_BUFFER_COUNT   6

Definition at line 51 of file stm32f7xx_eth_driver.h.

◆ STM32F7XX_ETH_RX_BUFFER_SIZE

#define STM32F7XX_ETH_RX_BUFFER_SIZE   1536

Definition at line 58 of file stm32f7xx_eth_driver.h.

◆ STM32F7XX_ETH_TX_BUFFER_COUNT

#define STM32F7XX_ETH_TX_BUFFER_COUNT   3

Definition at line 37 of file stm32f7xx_eth_driver.h.

◆ STM32F7XX_ETH_TX_BUFFER_SIZE

#define STM32F7XX_ETH_TX_BUFFER_SIZE   1536

Definition at line 44 of file stm32f7xx_eth_driver.h.

Function Documentation

◆ stm32f7xxEthCalcCrc()

uint32_t stm32f7xxEthCalcCrc ( const void *  data,
size_t  length 
)

CRC calculation.

Parameters
[in]dataPointer to the data over which to calculate the CRC
[in]lengthNumber of bytes to process
Returns
Resulting CRC value

Definition at line 1030 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthDisableIrq()

void stm32f7xxEthDisableIrq ( NetInterface interface)

Disable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 499 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthEnableIrq()

void stm32f7xxEthEnableIrq ( NetInterface interface)

Enable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 485 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthEventHandler()

void stm32f7xxEthEventHandler ( NetInterface interface)

STM32F746/756 Ethernet MAC event handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 565 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthInit()

error_t stm32f7xxEthInit ( NetInterface interface)

STM32F746/756 Ethernet MAC initialization.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 116 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthInitDmaDesc()

void stm32f7xxEthInitDmaDesc ( NetInterface interface)

Initialize DMA descriptor lists.

Parameters
[in]interfaceUnderlying network interface

Definition at line 404 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthInitGpio()

void stm32f7xxEthInitGpio ( NetInterface interface)

◆ stm32f7xxEthReadPhyReg()

uint16_t stm32f7xxEthReadPhyReg ( uint8_t  phyAddr,
uint8_t  regAddr 
)

Read PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
Returns
Register value

Definition at line 867 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthReadSmi()

uint32_t stm32f7xxEthReadSmi ( uint_t  length)

SMI read operation.

Parameters
[in]lengthNumber of bits to be read
Returns
Data resulting from the MDIO read operation

Definition at line 978 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthReceivePacket()

error_t stm32f7xxEthReceivePacket ( NetInterface interface)

Receive a packet.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 660 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthSendPacket()

error_t stm32f7xxEthSendPacket ( NetInterface interface,
const NetBuffer buffer,
size_t  offset 
)

Send a packet.

Parameters
[in]interfaceUnderlying network interface
[in]bufferMulti-part buffer containing the data to send
[in]offsetOffset to the first data byte
Returns
Error code

Definition at line 598 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthTick()

void stm32f7xxEthTick ( NetInterface interface)

STM32F746/756 Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters
[in]interfaceUnderlying network interface

Definition at line 473 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthUpdateMacAddrFilter()

error_t stm32f7xxEthUpdateMacAddrFilter ( NetInterface interface)

Configure MAC address filtering.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 728 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthUpdateMacConfig()

error_t stm32f7xxEthUpdateMacConfig ( NetInterface interface)

Adjust MAC configuration parameters for proper operation.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 784 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthWritePhyReg()

void stm32f7xxEthWritePhyReg ( uint8_t  phyAddr,
uint8_t  regAddr,
uint16_t  data 
)

Write PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
[in]dataRegister value

Definition at line 818 of file stm32f7xx_eth_driver.c.

◆ stm32f7xxEthWriteSmi()

void stm32f7xxEthWriteSmi ( uint32_t  data,
uint_t  length 
)

SMI write operation.

Parameters
[in]dataRaw data to be written
[in]lengthNumber of bits to be written

Definition at line 921 of file stm32f7xx_eth_driver.c.

Variable Documentation

◆ stm32f7xxEthDriver

const NicDriver stm32f7xxEthDriver

STM32F746/756 Ethernet MAC driver.

Definition at line 89 of file stm32f7xx_eth_driver.c.