dm9161_driver.c
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1 /**
2  * @file dm9161_driver.c
3  * @brief DM9161 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2020 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.8
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief DM9161 Ethernet PHY driver
42  **/
43 
45 {
46  dm9161Init,
47  dm9161Tick,
51 };
52 
53 
54 /**
55  * @brief DM9161 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  //Debug message
63  TRACE_INFO("Initializing DM9161...\r\n");
64 
65  //Undefined PHY address?
66  if(interface->phyAddr >= 32)
67  {
68  //Use the default address
69  interface->phyAddr = DM9161_PHY_ADDR;
70  }
71 
72  //Initialize serial management interface
73  if(interface->smiDriver != NULL)
74  {
75  interface->smiDriver->init();
76  }
77 
78  //Initialize external interrupt line driver
79  if(interface->extIntDriver != NULL)
80  {
81  interface->extIntDriver->init();
82  }
83 
84  //Reset PHY transceiver
86 
87  //Wait for the reset to complete
89  {
90  }
91 
92  //Dump PHY registers for debugging purpose
93  dm9161DumpPhyReg(interface);
94 
95  //The PHY will generate interrupts when link status changes are detected
98 
99  //Force the TCP/IP stack to poll the link state at startup
100  interface->phyEvent = TRUE;
101  //Notify the TCP/IP stack of the event
103 
104  //Successful initialization
105  return NO_ERROR;
106 }
107 
108 
109 /**
110  * @brief DM9161 timer handler
111  * @param[in] interface Underlying network interface
112  **/
113 
114 void dm9161Tick(NetInterface *interface)
115 {
116  uint16_t value;
117  bool_t linkState;
118 
119  //No external interrupt line driver?
120  if(interface->extIntDriver == NULL)
121  {
122  //Read basic status register
123  value = dm9161ReadPhyReg(interface, DM9161_BMSR);
124  //Retrieve current link state
125  linkState = (value & DM9161_BMSR_LINK_STATUS) ? TRUE : FALSE;
126 
127  //Link up event?
128  if(linkState && !interface->linkState)
129  {
130  //Set event flag
131  interface->phyEvent = TRUE;
132  //Notify the TCP/IP stack of the event
134  }
135  //Link down event?
136  else if(!linkState && interface->linkState)
137  {
138  //Set event flag
139  interface->phyEvent = TRUE;
140  //Notify the TCP/IP stack of the event
142  }
143  }
144 }
145 
146 
147 /**
148  * @brief Enable interrupts
149  * @param[in] interface Underlying network interface
150  **/
151 
153 {
154  //Enable PHY transceiver interrupts
155  if(interface->extIntDriver != NULL)
156  {
157  interface->extIntDriver->enableIrq();
158  }
159 }
160 
161 
162 /**
163  * @brief Disable interrupts
164  * @param[in] interface Underlying network interface
165  **/
166 
168 {
169  //Disable PHY transceiver interrupts
170  if(interface->extIntDriver != NULL)
171  {
172  interface->extIntDriver->disableIrq();
173  }
174 }
175 
176 
177 /**
178  * @brief DM9161 event handler
179  * @param[in] interface Underlying network interface
180  **/
181 
183 {
184  uint16_t value;
185  bool_t end;
186 
187  //Read status register to acknowledge the interrupt
188  value = dm9161ReadPhyReg(interface, DM9161_MDINTR);
189 
190  //Link status change?
191  if((value & DM9161_MDINTR_LINK_CHANGE) != 0)
192  {
193  //Any link failure condition is latched in the BMSR register. Reading
194  //the register twice will always return the actual link status
195  value = dm9161ReadPhyReg(interface, DM9161_BMSR);
196  value = dm9161ReadPhyReg(interface, DM9161_BMSR);
197 
198  //Link is up?
199  if((value & DM9161_BMSR_LINK_STATUS) != 0)
200  {
201  //Wait for the auto-negotiation to complete
202  do
203  {
204  //Read DSCSR register
205  value = dm9161ReadPhyReg(interface, DM9161_DSCSR);
206 
207  //Check current state
208  switch(value & DM9161_DSCSR_ANMB)
209  {
210  //Auto-negotiation is still in progress?
215  end = FALSE;
216  break;
217  //Auto-negotiation is complete?
218  default:
219  end = TRUE;
220  break;
221  }
222 
223  //Check loop condition variable
224  } while(!end);
225 
226  //Read DSCSR register
227  value = dm9161ReadPhyReg(interface, DM9161_DSCSR);
228 
229  //Check current operation mode
230  if((value & DM9161_DSCSR_10HDX) != 0)
231  {
232  //10BASE-T half-duplex
233  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
234  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
235  }
236  else if((value & DM9161_DSCSR_10FDX) != 0)
237  {
238  //10BASE-T full-duplex
239  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
240  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
241  }
242  else if((value & DM9161_DSCSR_100HDX) != 0)
243  {
244  //100BASE-TX half-duplex
245  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
246  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
247  }
248  else if((value & DM9161_DSCSR_100FDX) != 0)
249  {
250  //100BASE-TX full-duplex
251  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
252  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
253  }
254  else
255  {
256  //Debug message
257  TRACE_WARNING("Invalid operation mode!\r\n");
258  }
259 
260  //Update link state
261  interface->linkState = TRUE;
262 
263  //Adjust MAC configuration parameters for proper operation
264  interface->nicDriver->updateMacConfig(interface);
265  }
266  else
267  {
268  //Update link state
269  interface->linkState = FALSE;
270  }
271 
272  //Process link state change event
273  nicNotifyLinkChange(interface);
274  }
275 }
276 
277 
278 /**
279  * @brief Write PHY register
280  * @param[in] interface Underlying network interface
281  * @param[in] address PHY register address
282  * @param[in] data Register value
283  **/
284 
285 void dm9161WritePhyReg(NetInterface *interface, uint8_t address,
286  uint16_t data)
287 {
288  //Write the specified PHY register
289  if(interface->smiDriver != NULL)
290  {
291  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
292  interface->phyAddr, address, data);
293  }
294  else
295  {
296  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
297  interface->phyAddr, address, data);
298  }
299 }
300 
301 
302 /**
303  * @brief Read PHY register
304  * @param[in] interface Underlying network interface
305  * @param[in] address PHY register address
306  * @return Register value
307  **/
308 
309 uint16_t dm9161ReadPhyReg(NetInterface *interface, uint8_t address)
310 {
311  uint16_t data;
312 
313  //Read the specified PHY register
314  if(interface->smiDriver != NULL)
315  {
316  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
317  interface->phyAddr, address);
318  }
319  else
320  {
321  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
322  interface->phyAddr, address);
323  }
324 
325  //Return the value of the PHY register
326  return data;
327 }
328 
329 
330 /**
331  * @brief Dump PHY registers for debugging purpose
332  * @param[in] interface Underlying network interface
333  **/
334 
336 {
337  uint8_t i;
338 
339  //Loop through PHY registers
340  for(i = 0; i < 32; i++)
341  {
342  //Display current PHY register
343  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
344  dm9161ReadPhyReg(interface, i));
345  }
346 
347  //Terminate with a line feed
348  TRACE_DEBUG("\r\n");
349 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:532
void dm9161EventHandler(NetInterface *interface)
DM9161 event handler.
void dm9161Tick(NetInterface *interface)
DM9161 timer handler.
int bool_t
Definition: compiler_port.h:49
#define DM9161_DSCSR_ANMB_ACK_MATCH
#define netEvent
Definition: net_legacy.h:267
uint8_t data[]
Definition: ethernet.h:209
#define DM9161_DSCSR
Definition: dm9161_driver.h:53
#define TRUE
Definition: os_port.h:50
Ethernet PHY driver.
Definition: nic.h:292
#define SMI_OPCODE_WRITE
Definition: nic.h:65
void dm9161DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define FALSE
Definition: os_port.h:46
#define DM9161_MDINTR_INTR_MASK
error_t
Error codes.
Definition: error.h:42
#define DM9161_MDINTR_LINK_MASK
uint8_t value[]
Definition: tcp.h:332
#define DM9161_BMCR_RESET
Definition: dm9161_driver.h:61
void dm9161EnableIrq(NetInterface *interface)
Enable interrupts.
#define NetInterface
Definition: net.h:36
uint16_t dm9161ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
#define DM9161_MDINTR_LINK_CHANGE
error_t dm9161Init(NetInterface *interface)
DM9161 PHY transceiver initialization.
Definition: dm9161_driver.c:60
#define SMI_OPCODE_READ
Definition: nic.h:66
#define TRACE_INFO(...)
Definition: debug.h:95
#define DM9161_DSCSR_ANMB
#define DM9161_DSCSR_ANMB_LINK_READY
#define TRACE_WARNING(...)
Definition: debug.h:85
#define TRACE_DEBUG(...)
Definition: debug.h:107
void dm9161WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define DM9161_DSCSR_100HDX
const PhyDriver dm9161PhyDriver
DM9161 Ethernet PHY driver.
Definition: dm9161_driver.c:44
#define DM9161_BMCR
Definition: dm9161_driver.h:45
#define DM9161_DSCSR_ANMB_ABILITY_MATCH
#define DM9161_DSCSR_10FDX
#define DM9161_PHY_ADDR
Definition: dm9161_driver.h:39
#define DM9161_DSCSR_ANMB_CONSIST_MATCH
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define DM9161_DSCSR_10HDX
#define DM9161_DSCSR_100FDX
void dm9161DisableIrq(NetInterface *interface)
Disable interrupts.
TCP/IP stack core.
Success.
Definition: error.h:44
#define DM9161_BMSR
Definition: dm9161_driver.h:46
Debugging facilities.
#define DM9161_MDINTR
Definition: dm9161_driver.h:55
DM9161 Ethernet PHY driver.
#define DM9161_BMSR_LINK_STATUS
Definition: dm9161_driver.h:81