dm9161_driver.c
Go to the documentation of this file.
1 /**
2  * @file dm9161_driver.c
3  * @brief DM9161 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief DM9161 Ethernet PHY driver
42  **/
43 
45 {
46  dm9161Init,
47  dm9161Tick,
51  NULL,
52  NULL
53 };
54 
55 
56 /**
57  * @brief DM9161 PHY transceiver initialization
58  * @param[in] interface Underlying network interface
59  * @return Error code
60  **/
61 
63 {
64  //Debug message
65  TRACE_INFO("Initializing DM9161...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = DM9161_PHY_ADDR;
72  }
73 
74  //Initialize external interrupt line driver
75  if(interface->extIntDriver != NULL)
76  {
77  interface->extIntDriver->init();
78  }
79 
80  //Reset PHY transceiver
82 
83  //Wait for the reset to complete
85  {
86  }
87 
88  //Dump PHY registers for debugging purpose
89  dm9161DumpPhyReg(interface);
90 
91  //The PHY will generate interrupts when link status changes are detected
94 
95  //Force the TCP/IP stack to poll the link state at startup
96  interface->phyEvent = TRUE;
97  //Notify the TCP/IP stack of the event
99 
100  //Successful initialization
101  return NO_ERROR;
102 }
103 
104 
105 /**
106  * @brief DM9161 timer handler
107  * @param[in] interface Underlying network interface
108  **/
109 
110 void dm9161Tick(NetInterface *interface)
111 {
112  uint16_t value;
113  bool_t linkState;
114 
115  //No external interrupt line driver?
116  if(interface->extIntDriver == NULL)
117  {
118  //Read basic status register
119  value = dm9161ReadPhyReg(interface, DM9161_BMSR);
120  //Retrieve current link state
121  linkState = (value & DM9161_BMSR_LINK_STATUS) ? TRUE : FALSE;
122 
123  //Link up event?
124  if(linkState && !interface->linkState)
125  {
126  //Set event flag
127  interface->phyEvent = TRUE;
128  //Notify the TCP/IP stack of the event
130  }
131  //Link down event?
132  else if(!linkState && interface->linkState)
133  {
134  //Set event flag
135  interface->phyEvent = TRUE;
136  //Notify the TCP/IP stack of the event
138  }
139  }
140 }
141 
142 
143 /**
144  * @brief Enable interrupts
145  * @param[in] interface Underlying network interface
146  **/
147 
149 {
150  //Enable PHY transceiver interrupts
151  if(interface->extIntDriver != NULL)
152  {
153  interface->extIntDriver->enableIrq();
154  }
155 }
156 
157 
158 /**
159  * @brief Disable interrupts
160  * @param[in] interface Underlying network interface
161  **/
162 
164 {
165  //Disable PHY transceiver interrupts
166  if(interface->extIntDriver != NULL)
167  {
168  interface->extIntDriver->disableIrq();
169  }
170 }
171 
172 
173 /**
174  * @brief DM9161 event handler
175  * @param[in] interface Underlying network interface
176  **/
177 
179 {
180  uint16_t value;
181  bool_t end;
182 
183  //Read status register to acknowledge the interrupt
184  value = dm9161ReadPhyReg(interface, DM9161_MDINTR);
185 
186  //Link status change?
188  {
189  //Any link failure condition is latched in the BMSR register. Reading
190  //the register twice will always return the actual link status
191  value = dm9161ReadPhyReg(interface, DM9161_BMSR);
192  value = dm9161ReadPhyReg(interface, DM9161_BMSR);
193 
194  //Link is up?
196  {
197  //Wait for the auto-negotiation to complete
198  do
199  {
200  //Read DSCSR register
201  value = dm9161ReadPhyReg(interface, DM9161_DSCSR);
202 
203  //Check current state
204  switch(value & DM9161_DSCSR_ANMB)
205  {
206  //Auto-negotiation is still in progress?
211  end = FALSE;
212  break;
213  //Auto-negotiation is complete?
214  default:
215  end = TRUE;
216  break;
217  }
218 
219  //Check loop condition variable
220  } while(!end);
221 
222  //Read DSCSR register
223  value = dm9161ReadPhyReg(interface, DM9161_DSCSR);
224 
225  //Check current operation mode
227  {
228  //10BASE-T half-duplex
229  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
230  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
231  }
232  else if(value & DM9161_DSCSR_10FDX)
233  {
234  //10BASE-T full-duplex
235  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
236  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
237  }
238  else if(value & DM9161_DSCSR_100HDX)
239  {
240  //100BASE-TX half-duplex
241  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
242  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
243  }
244  else if(value & DM9161_DSCSR_100FDX)
245  {
246  //100BASE-TX full-duplex
247  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
248  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
249  }
250  else
251  {
252  //Debug message
253  TRACE_WARNING("Invalid operation mode!\r\n");
254  }
255 
256  //Update link state
257  interface->linkState = TRUE;
258 
259  //Adjust MAC configuration parameters for proper operation
260  interface->nicDriver->updateMacConfig(interface);
261  }
262  else
263  {
264  //Update link state
265  interface->linkState = FALSE;
266  }
267 
268  //Process link state change event
269  nicNotifyLinkChange(interface);
270  }
271 }
272 
273 
274 /**
275  * @brief Write PHY register
276  * @param[in] interface Underlying network interface
277  * @param[in] address PHY register address
278  * @param[in] data Register value
279  **/
280 
281 void dm9161WritePhyReg(NetInterface *interface, uint8_t address,
282  uint16_t data)
283 {
284  //Write the specified PHY register
285  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
286  interface->phyAddr, address, data);
287 }
288 
289 
290 /**
291  * @brief Read PHY register
292  * @param[in] interface Underlying network interface
293  * @param[in] address PHY register address
294  * @return Register value
295  **/
296 
297 uint16_t dm9161ReadPhyReg(NetInterface *interface, uint8_t address)
298 {
299  //Read the specified PHY register
300  return interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
301  interface->phyAddr, address);
302 }
303 
304 
305 /**
306  * @brief Dump PHY registers for debugging purpose
307  * @param[in] interface Underlying network interface
308  **/
309 
311 {
312  uint8_t i;
313 
314  //Loop through PHY registers
315  for(i = 0; i < 32; i++)
316  {
317  //Display current PHY register
318  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
319  dm9161ReadPhyReg(interface, i));
320  }
321 
322  //Terminate with a line feed
323  TRACE_DEBUG("\r\n");
324 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:525
void dm9161EventHandler(NetInterface *interface)
DM9161 event handler.
void dm9161Tick(NetInterface *interface)
DM9161 timer handler.
int bool_t
Definition: compiler_port.h:49
#define DM9161_DSCSR_ANMB_ACK_MATCH
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:119
#define DM9161_DSCSR
Definition: dm9161_driver.h:53
#define TRUE
Definition: os_port.h:50
PHY driver.
Definition: nic.h:214
#define SMI_OPCODE_WRITE
Definition: nic.h:62
void dm9161DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
#define FALSE
Definition: os_port.h:46
#define DM9161_MDINTR_INTR_MASK
error_t
Error codes.
Definition: error.h:42
#define DM9161_MDINTR_LINK_MASK
#define DM9161_BMCR_RESET
Definition: dm9161_driver.h:61
void dm9161EnableIrq(NetInterface *interface)
Enable interrupts.
#define NetInterface
Definition: net.h:36
uint16_t dm9161ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:105
#define DM9161_MDINTR_LINK_CHANGE
error_t dm9161Init(NetInterface *interface)
DM9161 PHY transceiver initialization.
Definition: dm9161_driver.c:62
OsEvent netEvent
Definition: net.c:77
#define SMI_OPCODE_READ
Definition: nic.h:63
#define TRACE_INFO(...)
Definition: debug.h:94
#define DM9161_DSCSR_ANMB
#define DM9161_DSCSR_ANMB_LINK_READY
#define TRACE_WARNING(...)
Definition: debug.h:84
#define TRACE_DEBUG(...)
Definition: debug.h:106
void dm9161WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define DM9161_DSCSR_100HDX
const PhyDriver dm9161PhyDriver
DM9161 Ethernet PHY driver.
Definition: dm9161_driver.c:44
#define DM9161_BMCR
Definition: dm9161_driver.h:45
#define DM9161_DSCSR_ANMB_ABILITY_MATCH
#define DM9161_DSCSR_10FDX
#define DM9161_PHY_ADDR
Definition: dm9161_driver.h:39
#define DM9161_DSCSR_ANMB_CONSIST_MATCH
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:118
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define DM9161_DSCSR_10HDX
#define DM9161_DSCSR_100FDX
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:106
uint8_t value[]
Definition: dtls_misc.h:150
void dm9161DisableIrq(NetInterface *interface)
Disable interrupts.
TCP/IP stack core.
uint8_t data[]
Definition: dtls_misc.h:176
@ NO_ERROR
Success.
Definition: error.h:44
#define DM9161_BMSR
Definition: dm9161_driver.h:46
Debugging facilities.
#define DM9161_MDINTR
Definition: dm9161_driver.h:55
DM9161 Ethernet PHY transceiver.
#define DM9161_BMSR_LINK_STATUS
Definition: dm9161_driver.h:81