dm9161_driver.h File Reference

DM9161 Ethernet PHY transceiver. More...

#include "core/nic.h"

Go to the source code of this file.

Macros

#define DM9161_PHY_ADDR   0
 
#define DM9161_PHY_REG_BMCR   0x00
 
#define DM9161_PHY_REG_BMSR   0x01
 
#define DM9161_PHY_REG_PHYIDR1   0x02
 
#define DM9161_PHY_REG_PHYIDR2   0x03
 
#define DM9161_PHY_REG_ANAR   0x04
 
#define DM9161_PHY_REG_ANLPAR   0x05
 
#define DM9161_PHY_REG_ANER   0x06
 
#define DM9161_PHY_REG_DSCR   0x10
 
#define DM9161_PHY_REG_DSCSR   0x11
 
#define DM9161_PHY_REG_10BTCSR   0x12
 
#define DM9161_PHY_REG_MDINTR   0x15
 
#define DM9161_PHY_REG_RECR   0x16
 
#define DM9161_PHY_REG_DISCR   0x17
 
#define DM9161_PHY_REG_RLSR   0x18
 
#define BMCR_RESET   (1 << 15)
 
#define BMCR_LOOPBACK   (1 << 14)
 
#define BMCR_SPEED_SEL   (1 << 13)
 
#define BMCR_AN_EN   (1 << 12)
 
#define BMCR_POWER_DOWN   (1 << 11)
 
#define BMCR_ISOLATE   (1 << 10)
 
#define BMCR_RESTART_AN   (1 << 9)
 
#define BMCR_DUPLEX_MODE   (1 << 8)
 
#define BMCR_COL_TEST   (1 << 7)
 
#define BMSR_100BT4   (1 << 15)
 
#define BMSR_100BTX_FD   (1 << 14)
 
#define BMSR_100BTX   (1 << 13)
 
#define BMSR_10BT_FD   (1 << 12)
 
#define BMSR_10BT   (1 << 11)
 
#define BMSR_NO_PREAMBLE   (1 << 6)
 
#define BMSR_AN_COMPLETE   (1 << 5)
 
#define BMSR_REMOTE_FAULT   (1 << 4)
 
#define BMSR_AN_ABLE   (1 << 3)
 
#define BMSR_LINK_STATUS   (1 << 2)
 
#define BMSR_JABBER_DETECT   (1 << 1)
 
#define BMSR_EXTENDED_CAP   (1 << 0)
 
#define ANAR_NP   (1 << 15)
 
#define ANAR_ACK   (1 << 14)
 
#define ANAR_RF   (1 << 13)
 
#define ANAR_FCS   (1 << 10)
 
#define ANAR_100BT4   (1 << 9)
 
#define ANAR_100BTX_FD   (1 << 8)
 
#define ANAR_100BTX   (1 << 7)
 
#define ANAR_10BT_FD   (1 << 6)
 
#define ANAR_10BT   (1 << 5)
 
#define ANAR_SELECTOR4   (1 << 4)
 
#define ANAR_SELECTOR3   (1 << 3)
 
#define ANAR_SELECTOR2   (1 << 2)
 
#define ANAR_SELECTOR1   (1 << 1)
 
#define ANAR_SELECTOR0   (1 << 0)
 
#define ANLPAR_NP   (1 << 15)
 
#define ANLPAR_ACK   (1 << 14)
 
#define ANLPAR_RF   (1 << 13)
 
#define ANLPAR_FCS   (1 << 10)
 
#define ANLPAR_100BT4   (1 << 9)
 
#define ANLPAR_100BTX_FD   (1 << 8)
 
#define ANLPAR_100BTX   (1 << 7)
 
#define ANLPAR_10BT_FD   (1 << 6)
 
#define ANLPAR_10BT   (1 << 5)
 
#define ANLPAR_SELECTOR4   (1 << 4)
 
#define ANLPAR_SELECTOR3   (1 << 3)
 
#define ANLPAR_SELECTOR2   (1 << 2)
 
#define ANLPAR_SELECTOR1   (1 << 1)
 
#define ANLPAR_SELECTOR0   (1 << 0)
 
#define ANER_PDF   (1 << 4)
 
#define ANER_LP_NP_ABLE   (1 << 3)
 
#define ANER_NP_ABLE   (1 << 2)
 
#define ANER_PAGE_RX   (1 << 1)
 
#define ANER_LP_AN_ABLE   (1 << 0)
 
#define DSCR_BP_4B5B   (1 << 15)
 
#define DSCR_BP_SCR   (1 << 14)
 
#define DSCR_BP_ALIGN   (1 << 13)
 
#define DSCR_BP_ADPOK   (1 << 12)
 
#define DSCR_REPEATER   (1 << 11)
 
#define DSCR_TX   (1 << 10)
 
#define DSCR_FEF   (1 << 9)
 
#define DSCR_RMII_EN   (1 << 8)
 
#define DSCR_F_LINK_100   (1 << 7)
 
#define DSCR_SPLED_CTL   (1 << 6)
 
#define DSCR_COLLED_CTL   (1 << 5)
 
#define DSCR_RPDCTR_EN   (1 << 4)
 
#define DSCR_SMRST   (1 << 3)
 
#define DSCR_MFPSC   (1 << 2)
 
#define DSCR_SLEEP   (1 << 1)
 
#define DSCR_RLOUT   (1 << 0)
 
#define DSCSR_100FDX   (1 << 15)
 
#define DSCSR_100HDX   (1 << 14)
 
#define DSCSR_10FDX   (1 << 13)
 
#define DSCSR_10HDX   (1 << 12)
 
#define DSCSR_PHYADR4   (1 << 8)
 
#define DSCSR_PHYADR3   (1 << 7)
 
#define DSCSR_PHYADR2   (1 << 6)
 
#define DSCSR_PHYADR1   (1 << 5)
 
#define DSCSR_PHYADR0   (1 << 4)
 
#define DSCSR_ANMB3   (1 << 3)
 
#define DSCSR_ANMB2   (1 << 2)
 
#define DSCSR_ANMB1   (1 << 1)
 
#define DSCSR_ANMB0   (1 << 0)
 
#define _10BTCSR_LP_EN   (1 << 14)
 
#define _10BTCSR_HBE   (1 << 13)
 
#define _10BTCSR_SQUELCH   (1 << 12)
 
#define _10BTCSR_JABEN   (1 << 11)
 
#define _10BTCSR_10BT_SER   (1 << 10)
 
#define _10BTCSR_POLR   (1 << 0)
 
#define MDINTR_INTR_PEND   (1 << 15)
 
#define MDINTR_FDX_MASK   (1 << 11)
 
#define MDINTR_SPD_MASK   (1 << 10)
 
#define MDINTR_LINK_MASK   (1 << 9)
 
#define MDINTR_INTR_MASK   (1 << 8)
 
#define MDINTR_FDX_CHANGE   (1 << 4)
 
#define MDINTR_SPD_CHANGE   (1 << 3)
 
#define MDINTR_LINK_CHANGE   (1 << 2)
 
#define MDINTR_INTR_STATUS   (1 << 0)
 
#define RLSR_LH_LEDST   (1 << 13)
 
#define RLSR_LH_CSTS   (1 << 12)
 
#define RLSR_LH_RMII   (1 << 11)
 
#define RLSR_LH_SCRAM   (1 << 10)
 
#define RLSR_LH_REPTR   (1 << 9)
 
#define RLSR_LH_TSTMOD   (1 << 8)
 
#define RLSR_LH_OP2   (1 << 7)
 
#define RLSR_LH_OP1   (1 << 6)
 
#define RLSR_LH_OP0   (1 << 5)
 
#define RLSR_LH_PH4   (1 << 4)
 
#define RLSR_LH_PH3   (1 << 3)
 
#define RLSR_LH_PH2   (1 << 2)
 
#define RLSR_LH_PH1   (1 << 1)
 
#define RLSR_LH_PH0   (1 << 0)
 
#define DSCSR_ANMB_MASK   0x000F
 
#define DSCSR_ANMB_IDLE   0x0000
 
#define DSCSR_ANMB_ABILITY_MATCH   0x0001
 
#define DSCSR_ANMB_ACK_MATCH   0x0002
 
#define DSCSR_ANMB_ACK_MATCH_FAILED   0x0003
 
#define DSCSR_ANMB_CONSIST_MATCH   0x0004
 
#define DSCSR_ANMB_CONSIST_MATCH_FAILED   0x0005
 
#define DSCSR_ANMB_SIGNAL_LINK_READY   0x0006
 
#define DSCSR_ANMB_SIGNAL_LINK_READY_FAILED   0x0007
 
#define DSCSR_ANMB_AN_SUCCESS   0x0008
 

Functions

error_t dm9161Init (NetInterface *interface)
 DM9161 PHY transceiver initialization. More...
 
void dm9161Tick (NetInterface *interface)
 DM9161 timer handler. More...
 
void dm9161EnableIrq (NetInterface *interface)
 Enable interrupts. More...
 
void dm9161DisableIrq (NetInterface *interface)
 Disable interrupts. More...
 
void dm9161EventHandler (NetInterface *interface)
 DM9161 event handler. More...
 
void dm9161WritePhyReg (NetInterface *interface, uint8_t address, uint16_t data)
 Write PHY register. More...
 
uint16_t dm9161ReadPhyReg (NetInterface *interface, uint8_t address)
 Read PHY register. More...
 
void dm9161DumpPhyReg (NetInterface *interface)
 Dump PHY registers for debugging purpose. More...
 

Variables

const PhyDriver dm9161PhyDriver
 DM9161 Ethernet PHY driver. More...
 

Detailed Description

DM9161 Ethernet PHY transceiver.

License

Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author
Oryx Embedded SARL (www.oryx-embedded.com)
Version
1.9.0

Definition in file dm9161_driver.h.

Macro Definition Documentation

◆ _10BTCSR_10BT_SER

#define _10BTCSR_10BT_SER   (1 << 10)

Definition at line 160 of file dm9161_driver.h.

◆ _10BTCSR_HBE

#define _10BTCSR_HBE   (1 << 13)

Definition at line 157 of file dm9161_driver.h.

◆ _10BTCSR_JABEN

#define _10BTCSR_JABEN   (1 << 11)

Definition at line 159 of file dm9161_driver.h.

◆ _10BTCSR_LP_EN

#define _10BTCSR_LP_EN   (1 << 14)

Definition at line 156 of file dm9161_driver.h.

◆ _10BTCSR_POLR

#define _10BTCSR_POLR   (1 << 0)

Definition at line 161 of file dm9161_driver.h.

◆ _10BTCSR_SQUELCH

#define _10BTCSR_SQUELCH   (1 << 12)

Definition at line 158 of file dm9161_driver.h.

◆ ANAR_100BT4

#define ANAR_100BT4   (1 << 9)

Definition at line 88 of file dm9161_driver.h.

◆ ANAR_100BTX

#define ANAR_100BTX   (1 << 7)

Definition at line 90 of file dm9161_driver.h.

◆ ANAR_100BTX_FD

#define ANAR_100BTX_FD   (1 << 8)

Definition at line 89 of file dm9161_driver.h.

◆ ANAR_10BT

#define ANAR_10BT   (1 << 5)

Definition at line 92 of file dm9161_driver.h.

◆ ANAR_10BT_FD

#define ANAR_10BT_FD   (1 << 6)

Definition at line 91 of file dm9161_driver.h.

◆ ANAR_ACK

#define ANAR_ACK   (1 << 14)

Definition at line 85 of file dm9161_driver.h.

◆ ANAR_FCS

#define ANAR_FCS   (1 << 10)

Definition at line 87 of file dm9161_driver.h.

◆ ANAR_NP

#define ANAR_NP   (1 << 15)

Definition at line 84 of file dm9161_driver.h.

◆ ANAR_RF

#define ANAR_RF   (1 << 13)

Definition at line 86 of file dm9161_driver.h.

◆ ANAR_SELECTOR0

#define ANAR_SELECTOR0   (1 << 0)

Definition at line 97 of file dm9161_driver.h.

◆ ANAR_SELECTOR1

#define ANAR_SELECTOR1   (1 << 1)

Definition at line 96 of file dm9161_driver.h.

◆ ANAR_SELECTOR2

#define ANAR_SELECTOR2   (1 << 2)

Definition at line 95 of file dm9161_driver.h.

◆ ANAR_SELECTOR3

#define ANAR_SELECTOR3   (1 << 3)

Definition at line 94 of file dm9161_driver.h.

◆ ANAR_SELECTOR4

#define ANAR_SELECTOR4   (1 << 4)

Definition at line 93 of file dm9161_driver.h.

◆ ANER_LP_AN_ABLE

#define ANER_LP_AN_ABLE   (1 << 0)

Definition at line 120 of file dm9161_driver.h.

◆ ANER_LP_NP_ABLE

#define ANER_LP_NP_ABLE   (1 << 3)

Definition at line 117 of file dm9161_driver.h.

◆ ANER_NP_ABLE

#define ANER_NP_ABLE   (1 << 2)

Definition at line 118 of file dm9161_driver.h.

◆ ANER_PAGE_RX

#define ANER_PAGE_RX   (1 << 1)

Definition at line 119 of file dm9161_driver.h.

◆ ANER_PDF

#define ANER_PDF   (1 << 4)

Definition at line 116 of file dm9161_driver.h.

◆ ANLPAR_100BT4

#define ANLPAR_100BT4   (1 << 9)

Definition at line 104 of file dm9161_driver.h.

◆ ANLPAR_100BTX

#define ANLPAR_100BTX   (1 << 7)

Definition at line 106 of file dm9161_driver.h.

◆ ANLPAR_100BTX_FD

#define ANLPAR_100BTX_FD   (1 << 8)

Definition at line 105 of file dm9161_driver.h.

◆ ANLPAR_10BT

#define ANLPAR_10BT   (1 << 5)

Definition at line 108 of file dm9161_driver.h.

◆ ANLPAR_10BT_FD

#define ANLPAR_10BT_FD   (1 << 6)

Definition at line 107 of file dm9161_driver.h.

◆ ANLPAR_ACK

#define ANLPAR_ACK   (1 << 14)

Definition at line 101 of file dm9161_driver.h.

◆ ANLPAR_FCS

#define ANLPAR_FCS   (1 << 10)

Definition at line 103 of file dm9161_driver.h.

◆ ANLPAR_NP

#define ANLPAR_NP   (1 << 15)

Definition at line 100 of file dm9161_driver.h.

◆ ANLPAR_RF

#define ANLPAR_RF   (1 << 13)

Definition at line 102 of file dm9161_driver.h.

◆ ANLPAR_SELECTOR0

#define ANLPAR_SELECTOR0   (1 << 0)

Definition at line 113 of file dm9161_driver.h.

◆ ANLPAR_SELECTOR1

#define ANLPAR_SELECTOR1   (1 << 1)

Definition at line 112 of file dm9161_driver.h.

◆ ANLPAR_SELECTOR2

#define ANLPAR_SELECTOR2   (1 << 2)

Definition at line 111 of file dm9161_driver.h.

◆ ANLPAR_SELECTOR3

#define ANLPAR_SELECTOR3   (1 << 3)

Definition at line 110 of file dm9161_driver.h.

◆ ANLPAR_SELECTOR4

#define ANLPAR_SELECTOR4   (1 << 4)

Definition at line 109 of file dm9161_driver.h.

◆ BMCR_AN_EN

#define BMCR_AN_EN   (1 << 12)

Definition at line 62 of file dm9161_driver.h.

◆ BMCR_COL_TEST

#define BMCR_COL_TEST   (1 << 7)

Definition at line 67 of file dm9161_driver.h.

◆ BMCR_DUPLEX_MODE

#define BMCR_DUPLEX_MODE   (1 << 8)

Definition at line 66 of file dm9161_driver.h.

◆ BMCR_ISOLATE

#define BMCR_ISOLATE   (1 << 10)

Definition at line 64 of file dm9161_driver.h.

◆ BMCR_LOOPBACK

#define BMCR_LOOPBACK   (1 << 14)

Definition at line 60 of file dm9161_driver.h.

◆ BMCR_POWER_DOWN

#define BMCR_POWER_DOWN   (1 << 11)

Definition at line 63 of file dm9161_driver.h.

◆ BMCR_RESET

#define BMCR_RESET   (1 << 15)

Definition at line 59 of file dm9161_driver.h.

◆ BMCR_RESTART_AN

#define BMCR_RESTART_AN   (1 << 9)

Definition at line 65 of file dm9161_driver.h.

◆ BMCR_SPEED_SEL

#define BMCR_SPEED_SEL   (1 << 13)

Definition at line 61 of file dm9161_driver.h.

◆ BMSR_100BT4

#define BMSR_100BT4   (1 << 15)

Definition at line 70 of file dm9161_driver.h.

◆ BMSR_100BTX

#define BMSR_100BTX   (1 << 13)

Definition at line 72 of file dm9161_driver.h.

◆ BMSR_100BTX_FD

#define BMSR_100BTX_FD   (1 << 14)

Definition at line 71 of file dm9161_driver.h.

◆ BMSR_10BT

#define BMSR_10BT   (1 << 11)

Definition at line 74 of file dm9161_driver.h.

◆ BMSR_10BT_FD

#define BMSR_10BT_FD   (1 << 12)

Definition at line 73 of file dm9161_driver.h.

◆ BMSR_AN_ABLE

#define BMSR_AN_ABLE   (1 << 3)

Definition at line 78 of file dm9161_driver.h.

◆ BMSR_AN_COMPLETE

#define BMSR_AN_COMPLETE   (1 << 5)

Definition at line 76 of file dm9161_driver.h.

◆ BMSR_EXTENDED_CAP

#define BMSR_EXTENDED_CAP   (1 << 0)

Definition at line 81 of file dm9161_driver.h.

◆ BMSR_JABBER_DETECT

#define BMSR_JABBER_DETECT   (1 << 1)

Definition at line 80 of file dm9161_driver.h.

◆ BMSR_LINK_STATUS

#define BMSR_LINK_STATUS   (1 << 2)

Definition at line 79 of file dm9161_driver.h.

◆ BMSR_NO_PREAMBLE

#define BMSR_NO_PREAMBLE   (1 << 6)

Definition at line 75 of file dm9161_driver.h.

◆ BMSR_REMOTE_FAULT

#define BMSR_REMOTE_FAULT   (1 << 4)

Definition at line 77 of file dm9161_driver.h.

◆ DM9161_PHY_ADDR

#define DM9161_PHY_ADDR   0

Definition at line 37 of file dm9161_driver.h.

◆ DM9161_PHY_REG_10BTCSR

#define DM9161_PHY_REG_10BTCSR   0x12

Definition at line 52 of file dm9161_driver.h.

◆ DM9161_PHY_REG_ANAR

#define DM9161_PHY_REG_ANAR   0x04

Definition at line 47 of file dm9161_driver.h.

◆ DM9161_PHY_REG_ANER

#define DM9161_PHY_REG_ANER   0x06

Definition at line 49 of file dm9161_driver.h.

◆ DM9161_PHY_REG_ANLPAR

#define DM9161_PHY_REG_ANLPAR   0x05

Definition at line 48 of file dm9161_driver.h.

◆ DM9161_PHY_REG_BMCR

#define DM9161_PHY_REG_BMCR   0x00

Definition at line 43 of file dm9161_driver.h.

◆ DM9161_PHY_REG_BMSR

#define DM9161_PHY_REG_BMSR   0x01

Definition at line 44 of file dm9161_driver.h.

◆ DM9161_PHY_REG_DISCR

#define DM9161_PHY_REG_DISCR   0x17

Definition at line 55 of file dm9161_driver.h.

◆ DM9161_PHY_REG_DSCR

#define DM9161_PHY_REG_DSCR   0x10

Definition at line 50 of file dm9161_driver.h.

◆ DM9161_PHY_REG_DSCSR

#define DM9161_PHY_REG_DSCSR   0x11

Definition at line 51 of file dm9161_driver.h.

◆ DM9161_PHY_REG_MDINTR

#define DM9161_PHY_REG_MDINTR   0x15

Definition at line 53 of file dm9161_driver.h.

◆ DM9161_PHY_REG_PHYIDR1

#define DM9161_PHY_REG_PHYIDR1   0x02

Definition at line 45 of file dm9161_driver.h.

◆ DM9161_PHY_REG_PHYIDR2

#define DM9161_PHY_REG_PHYIDR2   0x03

Definition at line 46 of file dm9161_driver.h.

◆ DM9161_PHY_REG_RECR

#define DM9161_PHY_REG_RECR   0x16

Definition at line 54 of file dm9161_driver.h.

◆ DM9161_PHY_REG_RLSR

#define DM9161_PHY_REG_RLSR   0x18

Definition at line 56 of file dm9161_driver.h.

◆ DSCR_BP_4B5B

#define DSCR_BP_4B5B   (1 << 15)

Definition at line 123 of file dm9161_driver.h.

◆ DSCR_BP_ADPOK

#define DSCR_BP_ADPOK   (1 << 12)

Definition at line 126 of file dm9161_driver.h.

◆ DSCR_BP_ALIGN

#define DSCR_BP_ALIGN   (1 << 13)

Definition at line 125 of file dm9161_driver.h.

◆ DSCR_BP_SCR

#define DSCR_BP_SCR   (1 << 14)

Definition at line 124 of file dm9161_driver.h.

◆ DSCR_COLLED_CTL

#define DSCR_COLLED_CTL   (1 << 5)

Definition at line 133 of file dm9161_driver.h.

◆ DSCR_F_LINK_100

#define DSCR_F_LINK_100   (1 << 7)

Definition at line 131 of file dm9161_driver.h.

◆ DSCR_FEF

#define DSCR_FEF   (1 << 9)

Definition at line 129 of file dm9161_driver.h.

◆ DSCR_MFPSC

#define DSCR_MFPSC   (1 << 2)

Definition at line 136 of file dm9161_driver.h.

◆ DSCR_REPEATER

#define DSCR_REPEATER   (1 << 11)

Definition at line 127 of file dm9161_driver.h.

◆ DSCR_RLOUT

#define DSCR_RLOUT   (1 << 0)

Definition at line 138 of file dm9161_driver.h.

◆ DSCR_RMII_EN

#define DSCR_RMII_EN   (1 << 8)

Definition at line 130 of file dm9161_driver.h.

◆ DSCR_RPDCTR_EN

#define DSCR_RPDCTR_EN   (1 << 4)

Definition at line 134 of file dm9161_driver.h.

◆ DSCR_SLEEP

#define DSCR_SLEEP   (1 << 1)

Definition at line 137 of file dm9161_driver.h.

◆ DSCR_SMRST

#define DSCR_SMRST   (1 << 3)

Definition at line 135 of file dm9161_driver.h.

◆ DSCR_SPLED_CTL

#define DSCR_SPLED_CTL   (1 << 6)

Definition at line 132 of file dm9161_driver.h.

◆ DSCR_TX

#define DSCR_TX   (1 << 10)

Definition at line 128 of file dm9161_driver.h.

◆ DSCSR_100FDX

#define DSCSR_100FDX   (1 << 15)

Definition at line 141 of file dm9161_driver.h.

◆ DSCSR_100HDX

#define DSCSR_100HDX   (1 << 14)

Definition at line 142 of file dm9161_driver.h.

◆ DSCSR_10FDX

#define DSCSR_10FDX   (1 << 13)

Definition at line 143 of file dm9161_driver.h.

◆ DSCSR_10HDX

#define DSCSR_10HDX   (1 << 12)

Definition at line 144 of file dm9161_driver.h.

◆ DSCSR_ANMB0

#define DSCSR_ANMB0   (1 << 0)

Definition at line 153 of file dm9161_driver.h.

◆ DSCSR_ANMB1

#define DSCSR_ANMB1   (1 << 1)

Definition at line 152 of file dm9161_driver.h.

◆ DSCSR_ANMB2

#define DSCSR_ANMB2   (1 << 2)

Definition at line 151 of file dm9161_driver.h.

◆ DSCSR_ANMB3

#define DSCSR_ANMB3   (1 << 3)

Definition at line 150 of file dm9161_driver.h.

◆ DSCSR_ANMB_ABILITY_MATCH

#define DSCSR_ANMB_ABILITY_MATCH   0x0001

Definition at line 193 of file dm9161_driver.h.

◆ DSCSR_ANMB_ACK_MATCH

#define DSCSR_ANMB_ACK_MATCH   0x0002

Definition at line 194 of file dm9161_driver.h.

◆ DSCSR_ANMB_ACK_MATCH_FAILED

#define DSCSR_ANMB_ACK_MATCH_FAILED   0x0003

Definition at line 195 of file dm9161_driver.h.

◆ DSCSR_ANMB_AN_SUCCESS

#define DSCSR_ANMB_AN_SUCCESS   0x0008

Definition at line 200 of file dm9161_driver.h.

◆ DSCSR_ANMB_CONSIST_MATCH

#define DSCSR_ANMB_CONSIST_MATCH   0x0004

Definition at line 196 of file dm9161_driver.h.

◆ DSCSR_ANMB_CONSIST_MATCH_FAILED

#define DSCSR_ANMB_CONSIST_MATCH_FAILED   0x0005

Definition at line 197 of file dm9161_driver.h.

◆ DSCSR_ANMB_IDLE

#define DSCSR_ANMB_IDLE   0x0000

Definition at line 192 of file dm9161_driver.h.

◆ DSCSR_ANMB_MASK

#define DSCSR_ANMB_MASK   0x000F

Definition at line 191 of file dm9161_driver.h.

◆ DSCSR_ANMB_SIGNAL_LINK_READY

#define DSCSR_ANMB_SIGNAL_LINK_READY   0x0006

Definition at line 198 of file dm9161_driver.h.

◆ DSCSR_ANMB_SIGNAL_LINK_READY_FAILED

#define DSCSR_ANMB_SIGNAL_LINK_READY_FAILED   0x0007

Definition at line 199 of file dm9161_driver.h.

◆ DSCSR_PHYADR0

#define DSCSR_PHYADR0   (1 << 4)

Definition at line 149 of file dm9161_driver.h.

◆ DSCSR_PHYADR1

#define DSCSR_PHYADR1   (1 << 5)

Definition at line 148 of file dm9161_driver.h.

◆ DSCSR_PHYADR2

#define DSCSR_PHYADR2   (1 << 6)

Definition at line 147 of file dm9161_driver.h.

◆ DSCSR_PHYADR3

#define DSCSR_PHYADR3   (1 << 7)

Definition at line 146 of file dm9161_driver.h.

◆ DSCSR_PHYADR4

#define DSCSR_PHYADR4   (1 << 8)

Definition at line 145 of file dm9161_driver.h.

◆ MDINTR_FDX_CHANGE

#define MDINTR_FDX_CHANGE   (1 << 4)

Definition at line 169 of file dm9161_driver.h.

◆ MDINTR_FDX_MASK

#define MDINTR_FDX_MASK   (1 << 11)

Definition at line 165 of file dm9161_driver.h.

◆ MDINTR_INTR_MASK

#define MDINTR_INTR_MASK   (1 << 8)

Definition at line 168 of file dm9161_driver.h.

◆ MDINTR_INTR_PEND

#define MDINTR_INTR_PEND   (1 << 15)

Definition at line 164 of file dm9161_driver.h.

◆ MDINTR_INTR_STATUS

#define MDINTR_INTR_STATUS   (1 << 0)

Definition at line 172 of file dm9161_driver.h.

◆ MDINTR_LINK_CHANGE

#define MDINTR_LINK_CHANGE   (1 << 2)

Definition at line 171 of file dm9161_driver.h.

◆ MDINTR_LINK_MASK

#define MDINTR_LINK_MASK   (1 << 9)

Definition at line 167 of file dm9161_driver.h.

◆ MDINTR_SPD_CHANGE

#define MDINTR_SPD_CHANGE   (1 << 3)

Definition at line 170 of file dm9161_driver.h.

◆ MDINTR_SPD_MASK

#define MDINTR_SPD_MASK   (1 << 10)

Definition at line 166 of file dm9161_driver.h.

◆ RLSR_LH_CSTS

#define RLSR_LH_CSTS   (1 << 12)

Definition at line 176 of file dm9161_driver.h.

◆ RLSR_LH_LEDST

#define RLSR_LH_LEDST   (1 << 13)

Definition at line 175 of file dm9161_driver.h.

◆ RLSR_LH_OP0

#define RLSR_LH_OP0   (1 << 5)

Definition at line 183 of file dm9161_driver.h.

◆ RLSR_LH_OP1

#define RLSR_LH_OP1   (1 << 6)

Definition at line 182 of file dm9161_driver.h.

◆ RLSR_LH_OP2

#define RLSR_LH_OP2   (1 << 7)

Definition at line 181 of file dm9161_driver.h.

◆ RLSR_LH_PH0

#define RLSR_LH_PH0   (1 << 0)

Definition at line 188 of file dm9161_driver.h.

◆ RLSR_LH_PH1

#define RLSR_LH_PH1   (1 << 1)

Definition at line 187 of file dm9161_driver.h.

◆ RLSR_LH_PH2

#define RLSR_LH_PH2   (1 << 2)

Definition at line 186 of file dm9161_driver.h.

◆ RLSR_LH_PH3

#define RLSR_LH_PH3   (1 << 3)

Definition at line 185 of file dm9161_driver.h.

◆ RLSR_LH_PH4

#define RLSR_LH_PH4   (1 << 4)

Definition at line 184 of file dm9161_driver.h.

◆ RLSR_LH_REPTR

#define RLSR_LH_REPTR   (1 << 9)

Definition at line 179 of file dm9161_driver.h.

◆ RLSR_LH_RMII

#define RLSR_LH_RMII   (1 << 11)

Definition at line 177 of file dm9161_driver.h.

◆ RLSR_LH_SCRAM

#define RLSR_LH_SCRAM   (1 << 10)

Definition at line 178 of file dm9161_driver.h.

◆ RLSR_LH_TSTMOD

#define RLSR_LH_TSTMOD   (1 << 8)

Definition at line 180 of file dm9161_driver.h.

Function Documentation

◆ dm9161DisableIrq()

void dm9161DisableIrq ( NetInterface interface)

Disable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 146 of file dm9161_driver.c.

◆ dm9161DumpPhyReg()

void dm9161DumpPhyReg ( NetInterface interface)

Dump PHY registers for debugging purpose.

Parameters
[in]interfaceUnderlying network interface

Definition at line 304 of file dm9161_driver.c.

◆ dm9161EnableIrq()

void dm9161EnableIrq ( NetInterface interface)

Enable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 133 of file dm9161_driver.c.

◆ dm9161EventHandler()

void dm9161EventHandler ( NetInterface interface)

DM9161 event handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 159 of file dm9161_driver.c.

◆ dm9161Init()

error_t dm9161Init ( NetInterface interface)

DM9161 PHY transceiver initialization.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 58 of file dm9161_driver.c.

◆ dm9161ReadPhyReg()

uint16_t dm9161ReadPhyReg ( NetInterface interface,
uint8_t  address 
)

Read PHY register.

Parameters
[in]interfaceUnderlying network interface
[in]addressPHY register address
Returns
Register value

Definition at line 284 of file dm9161_driver.c.

◆ dm9161Tick()

void dm9161Tick ( NetInterface interface)

DM9161 timer handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 95 of file dm9161_driver.c.

◆ dm9161WritePhyReg()

void dm9161WritePhyReg ( NetInterface interface,
uint8_t  address,
uint16_t  data 
)

Write PHY register.

Parameters
[in]interfaceUnderlying network interface
[in]addressPHY register address
[in]dataRegister value

Definition at line 262 of file dm9161_driver.c.

Variable Documentation

◆ dm9161PhyDriver

const PhyDriver dm9161PhyDriver

DM9161 Ethernet PHY driver.

Definition at line 42 of file dm9161_driver.c.