dp83620_driver.c
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1 /**
2  * @file dp83620_driver.c
3  * @brief DP83620 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief DP83620 Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief DP83620 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  //Debug message
63  TRACE_INFO("Initializing DP83620...\r\n");
64 
65  //Undefined PHY address?
66  if(interface->phyAddr >= 32)
67  {
68  //Use the default address
69  interface->phyAddr = DP83620_PHY_ADDR;
70  }
71 
72  //Initialize serial management interface
73  if(interface->smiDriver != NULL)
74  {
75  interface->smiDriver->init();
76  }
77 
78  //Initialize external interrupt line driver
79  if(interface->extIntDriver != NULL)
80  {
81  interface->extIntDriver->init();
82  }
83 
84  //A software reset is accomplished by setting the RESET bit of the BMCR register
86 
87  //Wait for the reset to complete
89  {
90  }
91 
92  //Dump PHY registers for debugging purpose
93  dp83620DumpPhyReg(interface);
94 
95  //Configure PWR_DOWN/INT pin as an interrupt output
98 
99  //The PHY will generate interrupts when link status changes are detected
101 
102  //Perform custom configuration
103  dp83620InitHook(interface);
104 
105  //Force the TCP/IP stack to poll the link state at startup
106  interface->phyEvent = TRUE;
107  //Notify the TCP/IP stack of the event
109 
110  //Successful initialization
111  return NO_ERROR;
112 }
113 
114 
115 /**
116  * @brief DP83620 custom configuration
117  * @param[in] interface Underlying network interface
118  **/
119 
120 __weak_func void dp83620InitHook(NetInterface *interface)
121 {
122 }
123 
124 
125 /**
126  * @brief DP83620 timer handler
127  * @param[in] interface Underlying network interface
128  **/
129 
130 void dp83620Tick(NetInterface *interface)
131 {
132  uint16_t value;
133  bool_t linkState;
134 
135  //No external interrupt line driver?
136  if(interface->extIntDriver == NULL)
137  {
138  //Read basic status register
139  value = dp83620ReadPhyReg(interface, DP83620_BMSR);
140  //Retrieve current link state
141  linkState = (value & DP83620_BMSR_LINK_STATUS) ? TRUE : FALSE;
142 
143  //Link up event?
144  if(linkState && !interface->linkState)
145  {
146  //Set event flag
147  interface->phyEvent = TRUE;
148  //Notify the TCP/IP stack of the event
150  }
151  //Link down event?
152  else if(!linkState && interface->linkState)
153  {
154  //Set event flag
155  interface->phyEvent = TRUE;
156  //Notify the TCP/IP stack of the event
158  }
159  }
160 }
161 
162 
163 /**
164  * @brief Enable interrupts
165  * @param[in] interface Underlying network interface
166  **/
167 
169 {
170  //Enable PHY transceiver interrupts
171  if(interface->extIntDriver != NULL)
172  {
173  interface->extIntDriver->enableIrq();
174  }
175 }
176 
177 
178 /**
179  * @brief Disable interrupts
180  * @param[in] interface Underlying network interface
181  **/
182 
184 {
185  //Disable PHY transceiver interrupts
186  if(interface->extIntDriver != NULL)
187  {
188  interface->extIntDriver->disableIrq();
189  }
190 }
191 
192 
193 /**
194  * @brief DP83620 event handler
195  * @param[in] interface Underlying network interface
196  **/
197 
199 {
200  uint16_t status;
201 
202  //Read status register to acknowledge the interrupt
203  status = dp83620ReadPhyReg(interface, DP83620_MISR);
204 
205  //Link status change?
206  if((status & DP83620_MISR_LINK_INT) != 0)
207  {
208  //Read PHY status register
209  status = dp83620ReadPhyReg(interface, DP83620_PHYSTS);
210 
211  //Link is up?
212  if((status & DP83620_PHYSTS_LINK_STATUS) != 0)
213  {
214  //Check current speed
215  if((status & DP83620_PHYSTS_SPEED_STATUS) != 0)
216  {
217  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
218  }
219  else
220  {
221  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
222  }
223 
224  //Check duplex mode
225  if((status & DP83620_PHYSTS_DUPLEX_STATUS) != 0)
226  {
227  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
228  }
229  else
230  {
231  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
232  }
233 
234  //Update link state
235  interface->linkState = TRUE;
236 
237  //Adjust MAC configuration parameters for proper operation
238  interface->nicDriver->updateMacConfig(interface);
239  }
240  else
241  {
242  //Update link state
243  interface->linkState = FALSE;
244  }
245 
246  //Process link state change event
247  nicNotifyLinkChange(interface);
248  }
249 }
250 
251 
252 /**
253  * @brief Write PHY register
254  * @param[in] interface Underlying network interface
255  * @param[in] address PHY register address
256  * @param[in] data Register value
257  **/
258 
259 void dp83620WritePhyReg(NetInterface *interface, uint8_t address,
260  uint16_t data)
261 {
262  //Write the specified PHY register
263  if(interface->smiDriver != NULL)
264  {
265  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
266  interface->phyAddr, address, data);
267  }
268  else
269  {
270  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
271  interface->phyAddr, address, data);
272  }
273 }
274 
275 
276 /**
277  * @brief Read PHY register
278  * @param[in] interface Underlying network interface
279  * @param[in] address PHY register address
280  * @return Register value
281  **/
282 
283 uint16_t dp83620ReadPhyReg(NetInterface *interface, uint8_t address)
284 {
285  uint16_t data;
286 
287  //Read the specified PHY register
288  if(interface->smiDriver != NULL)
289  {
290  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
291  interface->phyAddr, address);
292  }
293  else
294  {
295  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
296  interface->phyAddr, address);
297  }
298 
299  //Return the value of the PHY register
300  return data;
301 }
302 
303 
304 /**
305  * @brief Dump PHY registers for debugging purpose
306  * @param[in] interface Underlying network interface
307  **/
308 
310 {
311  uint8_t i;
312 
313  //Loop through PHY registers
314  for(i = 0; i < 32; i++)
315  {
316  //Display current PHY register
317  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
318  dp83620ReadPhyReg(interface, i));
319  }
320 
321  //Terminate with a line feed
322  TRACE_DEBUG("\r\n");
323 }
int bool_t
Definition: compiler_port.h:53
Debugging facilities.
#define TRACE_DEBUG(...)
Definition: debug.h:107
#define TRACE_INFO(...)
Definition: debug.h:95
const PhyDriver dp83620PhyDriver
DP83620 Ethernet PHY driver.
void dp83620EnableIrq(NetInterface *interface)
Enable interrupts.
__weak_func void dp83620InitHook(NetInterface *interface)
DP83620 custom configuration.
void dp83620Tick(NetInterface *interface)
DP83620 timer handler.
uint16_t dp83620ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void dp83620DisableIrq(NetInterface *interface)
Disable interrupts.
void dp83620WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
error_t dp83620Init(NetInterface *interface)
DP83620 PHY transceiver initialization.
void dp83620EventHandler(NetInterface *interface)
DP83620 event handler.
void dp83620DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
DP83620 Ethernet PHY driver.
#define DP83620_BMSR
#define DP83620_BMSR_LINK_STATUS
#define DP83620_MICR
#define DP83620_BMCR_RESET
#define DP83620_BMCR
#define DP83620_MICR_INTEN
#define DP83620_MICR_INT_OE
#define DP83620_PHYSTS_SPEED_STATUS
#define DP83620_MISR
#define DP83620_PHYSTS_DUPLEX_STATUS
#define DP83620_MISR_LINK_INT_EN
#define DP83620_PHYSTS_LINK_STATUS
#define DP83620_MISR_LINK_INT
#define DP83620_PHY_ADDR
#define DP83620_PHYSTS
error_t
Error codes.
Definition: error.h:43
@ NO_ERROR
Success.
Definition: error.h:44
uint8_t data[]
Definition: ethernet.h:222
Ipv6Addr address[]
Definition: ipv6.h:316
TCP/IP stack core.
#define NetInterface
Definition: net.h:36
#define netEvent
Definition: net_legacy.h:196
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:548
#define SMI_OPCODE_WRITE
Definition: nic.h:66
#define SMI_OPCODE_READ
Definition: nic.h:67
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
#define TRUE
Definition: os_port.h:50
#define FALSE
Definition: os_port.h:46
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
Ethernet PHY driver.
Definition: nic.h:308
uint8_t value[]
Definition: tcp.h:369