dp83620_driver.c
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1 /**
2  * @file dp83620_driver.c
3  * @brief DP83620 Ethernet PHY transceiver
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 //Switch to the appropriate trace level
30 #define TRACE_LEVEL NIC_TRACE_LEVEL
31 
32 //Dependencies
33 #include "core/net.h"
35 #include "debug.h"
36 
37 
38 /**
39  * @brief DP83620 Ethernet PHY driver
40  **/
41 
43 {
49 };
50 
51 
52 /**
53  * @brief DP83620 PHY transceiver initialization
54  * @param[in] interface Underlying network interface
55  * @return Error code
56  **/
57 
59 {
60  //Debug message
61  TRACE_INFO("Initializing DP83620...\r\n");
62 
63  //Initialize external interrupt line driver
64  if(interface->extIntDriver != NULL)
65  interface->extIntDriver->init();
66 
67  //A software reset is accomplished by setting the RESET bit of the BMCR register
69  //Wait for the reset to complete
71 
72  //Dump PHY registers for debugging purpose
73  dp83620DumpPhyReg(interface);
74 
75  //Configure PWR_DOWN/INT pin as an interrupt output
77  //The PHY will generate interrupts when link status changes are detected
79 
80  //Force the TCP/IP stack to poll the link state at startup
81  interface->phyEvent = TRUE;
82  //Notify the TCP/IP stack of the event
84 
85  //Successful initialization
86  return NO_ERROR;
87 }
88 
89 
90 /**
91  * @brief DP83620 timer handler
92  * @param[in] interface Underlying network interface
93  **/
94 
95 void dp83620Tick(NetInterface *interface)
96 {
97  uint16_t value;
98  bool_t linkState;
99 
100  //No external interrupt line driver?
101  if(interface->extIntDriver == NULL)
102  {
103  //Read basic status register
105  //Retrieve current link state
106  linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;
107 
108  //Link up event?
109  if(linkState && !interface->linkState)
110  {
111  //Set event flag
112  interface->phyEvent = TRUE;
113  //Notify the TCP/IP stack of the event
115  }
116  //Link down event?
117  else if(!linkState && interface->linkState)
118  {
119  //Set event flag
120  interface->phyEvent = TRUE;
121  //Notify the TCP/IP stack of the event
123  }
124  }
125 }
126 
127 
128 /**
129  * @brief Enable interrupts
130  * @param[in] interface Underlying network interface
131  **/
132 
134 {
135  //Enable PHY transceiver interrupts
136  if(interface->extIntDriver != NULL)
137  interface->extIntDriver->enableIrq();
138 }
139 
140 
141 /**
142  * @brief Disable interrupts
143  * @param[in] interface Underlying network interface
144  **/
145 
147 {
148  //Disable PHY transceiver interrupts
149  if(interface->extIntDriver != NULL)
150  interface->extIntDriver->disableIrq();
151 }
152 
153 
154 /**
155  * @brief DP83620 event handler
156  * @param[in] interface Underlying network interface
157  **/
158 
160 {
161  uint16_t status;
162 
163  //Read status register to acknowledge the interrupt
164  status = dp83620ReadPhyReg(interface, DP83620_PHY_REG_MISR);
165 
166  //Link status change?
167  if(status & MISR_LINK_INT)
168  {
169  //Read PHY status register
170  status = dp83620ReadPhyReg(interface, DP83620_PHY_REG_PHYSTS);
171 
172  //Link is up?
173  if(status & PHYSTS_LINK_STATUS)
174  {
175  //Check current speed
176  if(status & PHYSTS_SPEED_STATUS)
177  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
178  else
179  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
180 
181  //Check duplex mode
182  if(status & PHYSTS_DUPLEX_STATUS)
183  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
184  else
185  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
186 
187  //Update link state
188  interface->linkState = TRUE;
189 
190  //Adjust MAC configuration parameters for proper operation
191  interface->nicDriver->updateMacConfig(interface);
192  }
193  else
194  {
195  //Update link state
196  interface->linkState = FALSE;
197  }
198 
199  //Process link state change event
200  nicNotifyLinkChange(interface);
201  }
202 }
203 
204 
205 /**
206  * @brief Write PHY register
207  * @param[in] interface Underlying network interface
208  * @param[in] address PHY register address
209  * @param[in] data Register value
210  **/
211 
212 void dp83620WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
213 {
214  uint8_t phyAddr;
215 
216  //Get the address of the PHY transceiver
217  if(interface->phyAddr < 32)
218  phyAddr = interface->phyAddr;
219  else
220  phyAddr = DP83620_PHY_ADDR;
221 
222  //Write the specified PHY register
223  interface->nicDriver->writePhyReg(phyAddr, address, data);
224 }
225 
226 
227 /**
228  * @brief Read PHY register
229  * @param[in] interface Underlying network interface
230  * @param[in] address PHY register address
231  * @return Register value
232  **/
233 
234 uint16_t dp83620ReadPhyReg(NetInterface *interface, uint8_t address)
235 {
236  uint8_t phyAddr;
237 
238  //Get the address of the PHY transceiver
239  if(interface->phyAddr < 32)
240  phyAddr = interface->phyAddr;
241  else
242  phyAddr = DP83620_PHY_ADDR;
243 
244  //Read the specified PHY register
245  return interface->nicDriver->readPhyReg(phyAddr, address);
246 }
247 
248 
249 /**
250  * @brief Dump PHY registers for debugging purpose
251  * @param[in] interface Underlying network interface
252  **/
253 
255 {
256  uint8_t i;
257 
258  //Loop through PHY registers
259  for(i = 0; i < 32; i++)
260  {
261  //Display current PHY register
262  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i, dp83620ReadPhyReg(interface, i));
263  }
264 
265  //Terminate with a line feed
266  TRACE_DEBUG("\r\n");
267 }
void nicNotifyLinkChange(NetInterface *interface)
Process link state change event.
Definition: nic.c:298
#define PHYSTS_LINK_STATUS
TCP/IP stack core.
Debugging facilities.
#define DP83620_PHY_REG_BMCR
#define MICR_INTEN
DP83620 Ethernet PHY transceiver.
#define BMSR_LINK_STATUS
Definition: ar8031_driver.h:95
#define DP83620_PHY_REG_MICR
error_t dp83620Init(NetInterface *interface)
DP83620 PHY transceiver initialization.
uint16_t dp83620ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
#define TRUE
Definition: os_port.h:48
#define PHYSTS_SPEED_STATUS
void dp83620Tick(NetInterface *interface)
DP83620 timer handler.
PHY driver.
Definition: nic.h:196
void dp83620EventHandler(NetInterface *interface)
DP83620 event handler.
#define DP83620_PHY_ADDR
#define PHYSTS_DUPLEX_STATUS
#define DP83620_PHY_REG_PHYSTS
#define BMCR_RESET
Definition: ar8031_driver.h:71
const PhyDriver dp83620PhyDriver
DP83620 Ethernet PHY driver.
void dp83620EnableIrq(NetInterface *interface)
Enable interrupts.
#define TRACE_INFO(...)
Definition: debug.h:86
Success.
Definition: error.h:42
Ipv6Addr address
#define DP83620_PHY_REG_BMSR
OsEvent netEvent
Definition: net.c:72
void dp83620DisableIrq(NetInterface *interface)
Disable interrupts.
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
error_t
Error codes.
Definition: error.h:40
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
uint8_t value[]
Definition: dtls_misc.h:141
#define MICR_INT_OE
void dp83620DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
void dp83620WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
#define MISR_LINK_INT_EN
#define FALSE
Definition: os_port.h:44
#define MISR_LINK_INT
int bool_t
Definition: compiler_port.h:47
#define DP83620_PHY_REG_MISR
#define TRACE_DEBUG(...)
Definition: debug.h:98