dp83620_driver.h File Reference

DP83620 Ethernet PHY transceiver. More...

#include "core/nic.h"

Go to the source code of this file.

Macros

#define DP83620_PHY_ADDR   1
 
#define DP83620_PHY_REG_BMCR   0x00
 
#define DP83620_PHY_REG_BMSR   0x01
 
#define DP83620_PHY_REG_PHYIDR1   0x02
 
#define DP83620_PHY_REG_PHYIDR2   0x03
 
#define DP83620_PHY_REG_ANAR   0x04
 
#define DP83620_PHY_REG_ANLPAR   0x05
 
#define DP83620_PHY_REG_ANER   0x06
 
#define DP83620_PHY_REG_ANNPTR   0x07
 
#define DP83620_PHY_REG_PHYSTS   0x10
 
#define DP83620_PHY_REG_MICR   0x11
 
#define DP83620_PHY_REG_MISR   0x12
 
#define DP83620_PHY_REG_PAGESEL   0x13
 
#define DP83620_PHY_REG_FCSCR   0x14
 
#define DP83620_PHY_REG_RECR   0x15
 
#define DP83620_PHY_REG_PCSR   0x16
 
#define DP83620_PHY_REG_RBR   0x17
 
#define DP83620_PHY_REG_LEDCR   0x18
 
#define DP83620_PHY_REG_PHYCR   0x19
 
#define DP83620_PHY_REG_10BTSCR   0x1A
 
#define DP83620_PHY_REG_CDCTRL1   0x1B
 
#define DP83620_PHY_REG_PHYCR2   0x1C
 
#define DP83620_PHY_REG_EDCR   0x1D
 
#define DP83620_PHY_REG_PCFCR   0x1F
 
#define DP83620_PHY_REG_SD_CNFG   0x1E
 
#define DP83620_PHY_REG_LEN100_DET   0x14
 
#define DP83620_PHY_REG_FREQ100   0x15
 
#define DP83620_PHY_REG_TDR_CTRL   0x16
 
#define DP83620_PHY_REG_TDR_WIN   0x17
 
#define DP83620_PHY_REG_TDR_PEAK   0x18
 
#define DP83620_PHY_REG_TDR_THR   0x19
 
#define DP83620_PHY_REG_VAR_CTRL   0x1A
 
#define DP83620_PHY_REG_VAR_DAT   0x1B
 
#define DP83620_PHY_REG_LQMR   0x1D
 
#define DP83620_PHY_REG_LQDR   0x1E
 
#define DP83620_PHY_REG_LQMR2   0x1F
 
#define DP83620_PHY_REG_PSF_CFG   0x18
 
#define BMCR_RESET   (1 << 15)
 
#define BMCR_LOOPBACK   (1 << 14)
 
#define BMCR_SPEED_SEL   (1 << 13)
 
#define BMCR_AN_EN   (1 << 12)
 
#define BMCR_POWER_DOWN   (1 << 11)
 
#define BMCR_ISOLATE   (1 << 10)
 
#define BMCR_RESTART_AN   (1 << 9)
 
#define BMCR_DUPLEX_MODE   (1 << 8)
 
#define BMCR_COL_TEST   (1 << 7)
 
#define BMCR_UNIDIRECTIONAL_EN   (1 << 5)
 
#define BMSR_100BT4   (1 << 15)
 
#define BMSR_100BTX_FD   (1 << 14)
 
#define BMSR_100BTX   (1 << 13)
 
#define BMSR_10BT_FD   (1 << 12)
 
#define BMSR_10BT   (1 << 11)
 
#define BMSR_UNIDIRECTIONAL_ABLE   (1 << 7)
 
#define BMSR_NO_PREAMBLE   (1 << 6)
 
#define BMSR_AN_COMPLETE   (1 << 5)
 
#define BMSR_REMOTE_FAULT   (1 << 4)
 
#define BMSR_AN_ABLE   (1 << 3)
 
#define BMSR_LINK_STATUS   (1 << 2)
 
#define BMSR_JABBER_DETECT   (1 << 1)
 
#define BMSR_EXTENDED_CAP   (1 << 0)
 
#define ANAR_NP   (1 << 15)
 
#define ANAR_RF   (1 << 13)
 
#define ANAR_ASM_DIR   (1 << 11)
 
#define ANAR_PAUSE   (1 << 10)
 
#define ANAR_100BT4   (1 << 9)
 
#define ANAR_100BTX_FD   (1 << 8)
 
#define ANAR_100BTX   (1 << 7)
 
#define ANAR_10BT_FD   (1 << 6)
 
#define ANAR_10BT   (1 << 5)
 
#define ANAR_SELECTOR4   (1 << 4)
 
#define ANAR_SELECTOR3   (1 << 3)
 
#define ANAR_SELECTOR2   (1 << 2)
 
#define ANAR_SELECTOR1   (1 << 1)
 
#define ANAR_SELECTOR0   (1 << 0)
 
#define ANLPAR_NP   (1 << 15)
 
#define ANLPAR_ACK   (1 << 14)
 
#define ANLPAR_RF   (1 << 13)
 
#define ANLPAR_ASM_DIR   (1 << 11)
 
#define ANLPAR_PAUSE   (1 << 10)
 
#define ANLPAR_100BT4   (1 << 9)
 
#define ANLPAR_100BTX_FD   (1 << 8)
 
#define ANLPAR_100BTX   (1 << 7)
 
#define ANLPAR_10BT_FD   (1 << 6)
 
#define ANLPAR_10BT   (1 << 5)
 
#define ANLPAR_SELECTOR4   (1 << 4)
 
#define ANLPAR_SELECTOR3   (1 << 3)
 
#define ANLPAR_SELECTOR2   (1 << 2)
 
#define ANLPAR_SELECTOR1   (1 << 1)
 
#define ANLPAR_SELECTOR0   (1 << 0)
 
#define ANER_PDF   (1 << 4)
 
#define ANER_LP_NP_ABLE   (1 << 3)
 
#define ANER_NP_ABLE   (1 << 2)
 
#define ANER_PAGE_RX   (1 << 1)
 
#define ANER_LP_AN_ABLE   (1 << 0)
 
#define ANNPTR_NP   (1 << 15)
 
#define ANNPTR_MP   (1 << 13)
 
#define ANNPTR_ACK2   (1 << 12)
 
#define ANNPTR_TOG_TX   (1 << 11)
 
#define ANNPTR_CODE10   (1 << 10)
 
#define ANNPTR_CODE9   (1 << 9)
 
#define ANNPTR_CODE8   (1 << 8)
 
#define ANNPTR_CODE7   (1 << 7)
 
#define ANNPTR_CODE6   (1 << 6)
 
#define ANNPTR_CODE5   (1 << 5)
 
#define ANNPTR_CODE4   (1 << 4)
 
#define ANNPTR_CODE3   (1 << 3)
 
#define ANNPTR_CODE2   (1 << 2)
 
#define ANNPTR_CODE1   (1 << 1)
 
#define ANNPTR_CODE0   (1 << 0)
 
#define PHYSTS_MDIX_MODE   (1 << 14)
 
#define PHYSTS_RX_ERROR_LATCH   (1 << 13)
 
#define PHYSTS_POLARITY_STATUS   (1 << 12)
 
#define PHYSTS_FALSE_CARRIER_SENSE   (1 << 11)
 
#define PHYSTS_SIGNAL_DETECT   (1 << 10)
 
#define PHYSTS_DESCRAMBLER_LOCK   (1 << 9)
 
#define PHYSTS_PAGE_RECEIVED   (1 << 8)
 
#define PHYSTS_MII_INTERRUPT   (1 << 7)
 
#define PHYSTS_REMOTE_FAULT   (1 << 6)
 
#define PHYSTS_JABBER_DETECT   (1 << 5)
 
#define PHYSTS_AN_COMPLETE   (1 << 4)
 
#define PHYSTS_LOOPBACK_STATUS   (1 << 3)
 
#define PHYSTS_DUPLEX_STATUS   (1 << 2)
 
#define PHYSTS_SPEED_STATUS   (1 << 1)
 
#define PHYSTS_LINK_STATUS   (1 << 0)
 
#define MICR_TINT   (1 << 2)
 
#define MICR_INTEN   (1 << 1)
 
#define MICR_INT_OE   (1 << 0)
 
#define MISR_ED_INT   (1 << 14)
 
#define MISR_LINK_INT   (1 << 13)
 
#define MISR_SPD_INT   (1 << 12)
 
#define MISR_DUP_INT   (1 << 11)
 
#define MISR_ANC_INT   (1 << 10)
 
#define MISR_FHF_INT   (1 << 9)
 
#define MISR_RHF_INT   (1 << 8)
 
#define MISR_LQ_INT_EN   (1 << 7)
 
#define MISR_ED_INT_EN   (1 << 6)
 
#define MISR_LINK_INT_EN   (1 << 5)
 
#define MISR_SPD_INT_EN   (1 << 4)
 
#define MISR_DUP_INT_EN   (1 << 3)
 
#define MISR_ANC_INT_EN   (1 << 2)
 
#define MISR_FHF_INT_EN   (1 << 1)
 
#define MISR_RHF_INT_EN   (1 << 0)
 
#define PAGESEL_PAGE_SEL2   (1 << 2)
 
#define PAGESEL_PAGE_SEL1   (1 << 1)
 
#define PAGESEL_PAGE_SEL0   (1 << 0)
 
#define FCSCR_FCSCNT7   (1 << 7)
 
#define FCSCR_FCSCNT6   (1 << 6)
 
#define FCSCR_FCSCNT5   (1 << 5)
 
#define FCSCR_FCSCNT4   (1 << 4)
 
#define FCSCR_FCSCNT3   (1 << 3)
 
#define FCSCR_FCSCNT2   (1 << 2)
 
#define FCSCR_FCSCNT1   (1 << 1)
 
#define FCSCR_FCSCNT0   (1 << 0)
 
#define RECR_RXERCNT7   (1 << 7)
 
#define RECR_RXERCNT6   (1 << 6)
 
#define RECR_RXERCNT5   (1 << 5)
 
#define RECR_RXERCNT4   (1 << 4)
 
#define RECR_RXERCNT3   (1 << 3)
 
#define RECR_RXERCNT2   (1 << 2)
 
#define RECR_RXERCNT1   (1 << 1)
 
#define RECR_RXERCNT0   (1 << 0)
 
#define PCSR_AUTO_CROSSOVER   (1 << 15)
 
#define PCSR_FREE_CLK   (1 << 11)
 
#define PCSR_TQ_EN   (1 << 10)
 
#define PCSR_SD_FORCE_PMA   (1 << 9)
 
#define PCSR_SD_OPTION   (1 << 8)
 
#define PCSR_DESC_TIME   (1 << 7)
 
#define PCSR_FX_EN   (1 << 6)
 
#define PCSR_FORCE_100_OK   (1 << 5)
 
#define PCSR_FEFI_EN   (1 << 3)
 
#define PCSR_NRZI_BYPASS   (1 << 2)
 
#define PCSR_SCRAM_BYPASS   (1 << 1)
 
#define PCSR_DESCRAM_BYPASS   (1 << 0)
 
#define RBR_RMII_MASTER   (1 << 14)
 
#define RBR_DIS_TX_OPT   (1 << 13)
 
#define RBR_PMD_LOOP   (1 << 8)
 
#define RBR_SCMII_RX   (1 << 7)
 
#define RBR_SCMII_TX   (1 << 6)
 
#define RBR_RMII_MODE   (1 << 5)
 
#define RBR_RMII_REV1_0   (1 << 4)
 
#define RBR_RX_OVF_STS   (1 << 3)
 
#define RBR_RX_UNF_STS   (1 << 2)
 
#define RBR_ELAST_BUF1   (1 << 1)
 
#define RBR_ELAST_BUF0   (1 << 0)
 
#define LEDCR_DIS_SPDLED   (1 << 11)
 
#define LEDCR_DIS_LNKLED   (1 << 10)
 
#define LEDCR_DIS_ACTLED   (1 << 9)
 
#define LEDCR_LEDACT_RX   (1 << 8)
 
#define LEDCR_BLINK_FREQ1   (1 << 7)
 
#define LEDCR_BLINK_FREQ0   (1 << 6)
 
#define LEDCR_DRV_SPDLED   (1 << 5)
 
#define LEDCR_DRV_LNKLED   (1 << 4)
 
#define LEDCR_DRV_ACTLED   (1 << 3)
 
#define LEDCR_SPDLED   (1 << 2)
 
#define LEDCR_LNKLED   (1 << 1)
 
#define LEDCR_ACTLED   (1 << 0)
 
#define LEDCR_BLINK_FREQ_6HZ   (0 << 6)
 
#define LEDCR_BLINK_FREQ_12HZ   (1 << 6)
 
#define LEDCR_BLINK_FREQ_24HZ   (2 << 6)
 
#define LEDCR_BLINK_FREQ_48HZ   (3 << 6)
 
#define PHYCR_MDIX_EN   (1 << 15)
 
#define PHYCR_FORCE_MDIX   (1 << 14)
 
#define PHYCR_PAUSE_RX   (1 << 13)
 
#define PHYCR_PAUSE_TX   (1 << 12)
 
#define PHYCR_BIST_FE   (1 << 11)
 
#define PHYCR_PSR_15   (1 << 10)
 
#define PHYCR_BIST_STATUS   (1 << 9)
 
#define PHYCR_BIST_START   (1 << 8)
 
#define PHYCR_BP_STRETCH   (1 << 7)
 
#define PHYCR_LED_CNFG1   (1 << 6)
 
#define PHYCR_LED_CNFG0   (1 << 5)
 
#define PHYCR_PHYADDR4   (1 << 4)
 
#define PHYCR_PHYADDR3   (1 << 3)
 
#define PHYCR_PHYADDR2   (1 << 2)
 
#define PHYCR_PHYADDR1   (1 << 1)
 
#define PHYCR_PHYADDR0   (1 << 0)
 
#define _10BTSCR_10BT_SERIAL   (1 << 15)
 
#define _10BTSCR_SQUELCH2   (1 << 11)
 
#define _10BTSCR_SQUELCH1   (1 << 10)
 
#define _10BTSCR_SQUELCH0   (1 << 9)
 
#define _10BTSCR_LOOPBACK_10_DIS   (1 << 8)
 
#define _10BTSCR_LP_DIS   (1 << 7)
 
#define _10BTSCR_FORCE_LINK_10   (1 << 6)
 
#define _10BTSCR_POLARITY   (1 << 4)
 
#define _10BTSCR_AUTOPOL_DIS   (1 << 3)
 
#define _10BTSCR_10BT_SCALE_MSB   (1 << 2)
 
#define _10BTSCR_HEARTBEAT_DIS   (1 << 1)
 
#define _10BTSCR_JABBER_DIS   (1 << 0)
 
#define CDCTRL1_BIST_ERROR_COUNT7   (1 << 15)
 
#define CDCTRL1_BIST_ERROR_COUNT6   (1 << 14)
 
#define CDCTRL1_BIST_ERROR_COUNT5   (1 << 13)
 
#define CDCTRL1_BIST_ERROR_COUNT4   (1 << 12)
 
#define CDCTRL1_BIST_ERROR_COUNT3   (1 << 11)
 
#define CDCTRL1_BIST_ERROR_COUNT2   (1 << 10)
 
#define CDCTRL1_BIST_ERROR_COUNT1   (1 << 9)
 
#define CDCTRL1_BIST_ERROR_COUNT0   (1 << 8)
 
#define CDCTRL1_MII_CLOCK_EN   (1 << 6)
 
#define CDCTRL1_BIST_CONT   (1 << 5)
 
#define CDCTRL1_CDPATTEN_10   (1 << 4)
 
#define CDCTRL1_MDIO_PULL_EN   (1 << 3)
 
#define CDCTRL1_PATT_GAP_10M   (1 << 2)
 
#define CDCTRL1_CDPATTSEL1   (1 << 1)
 
#define CDCTRL1_CDPATTSEL0   (1 << 0)
 
#define PHYCR2_SYNC_ENET_EN   (1 << 13)
 
#define PHYCR2_CLK_OUT   RXCLK (1 << 12)
 
#define PHYCR2_BC_WRITE   (1 << 11)
 
#define PHYCR2_PHYTER_COMP   (1 << 10)
 
#define PHYCR2_SOFT_RESET   (1 << 9)
 
#define PHYCR2_CLK_OUT_DIS   (1 << 1)
 
#define EDCR_ED_EN   (1 << 15)
 
#define EDCR_ED_AUTO_UP   (1 << 14)
 
#define EDCR_ED_AUTO_DOWN   (1 << 13)
 
#define EDCR_ED_MAN   (1 << 12)
 
#define EDCR_ED_BURST_DIS   (1 << 11)
 
#define EDCR_ED_PWR_STATE   (1 << 10)
 
#define EDCR_ED_ERR_MET   (1 << 9)
 
#define EDCR_ED_DATA_MET   (1 << 8)
 
#define EDCR_ED_ERR_COUNT3   (1 << 7)
 
#define EDCR_ED_ERR_COUNT2   (1 << 6)
 
#define EDCR_ED_ERR_COUNT1   (1 << 5)
 
#define EDCR_ED_ERR_COUNT0   (1 << 4)
 
#define EDCR_ED_DATA_COUNT3   (1 << 3)
 
#define EDCR_ED_DATA_COUNT2   (1 << 2)
 
#define EDCR_ED_DATA_COUNT1   (1 << 1)
 
#define EDCR_ED_DATA_COUNT0   (1 << 0)
 
#define PCFCR_PCF_STS_ERR   (1 << 15)
 
#define PCFCR_PCF_STS_OK   (1 << 14)
 
#define PCFCR_PCF_DA_SEL   (1 << 8)
 
#define PCFCR_PCF_INT_CTL1   (1 << 7)
 
#define PCFCR_PCF_INT_CTL0   (1 << 6)
 
#define PCFCR_PCF_BC_DIS   (1 << 5)
 
#define PCFCR_PCF_BUF3   (1 << 4)
 
#define PCFCR_PCF_BUF2   (1 << 3)
 
#define PCFCR_PCF_BUF1   (1 << 2)
 
#define PCFCR_PCF_BUF0   (1 << 1)
 
#define PCFCR_PCF_EN   (1 << 0)
 
#define SD_CNFG_SD_TIME   (1 << 8)
 
#define LEN100_DET_CABLE_LEN7   (1 << 7)
 
#define LEN100_DET_CABLE_LEN6   (1 << 6)
 
#define LEN100_DET_CABLE_LEN5   (1 << 5)
 
#define LEN100_DET_CABLE_LEN4   (1 << 4)
 
#define LEN100_DET_CABLE_LEN3   (1 << 3)
 
#define LEN100_DET_CABLE_LEN2   (1 << 2)
 
#define LEN100_DET_CABLE_LEN1   (1 << 1)
 
#define LEN100_DET_CABLE_LEN0   (1 << 0)
 
#define FREQ100_SAMPLE_FREQ   (1 << 15)
 
#define FREQ100_SEL_FC   (1 << 8)
 
#define FREQ100_FREQ_OFFSET7   (1 << 7)
 
#define FREQ100_FREQ_OFFSET6   (1 << 6)
 
#define FREQ100_FREQ_OFFSET5   (1 << 5)
 
#define FREQ100_FREQ_OFFSET4   (1 << 4)
 
#define FREQ100_FREQ_OFFSET3   (1 << 3)
 
#define FREQ100_FREQ_OFFSET2   (1 << 2)
 
#define FREQ100_FREQ_OFFSET1   (1 << 1)
 
#define FREQ100_FREQ_OFFSET0   (1 << 0)
 
#define TDR_CTRL_TDR_ENABLE   (1 << 15)
 
#define TDR_CTRL_TDR_100MB   (1 << 14)
 
#define TDR_CTRL_TX_CHANNEL   (1 << 13)
 
#define TDR_CTRL_RX_CHANNEL   (1 << 12)
 
#define TDR_CTRL_SEND_TDR   (1 << 11)
 
#define TDR_CTRL_TDR_WIDTH2   (1 << 10)
 
#define TDR_CTRL_TDR_WIDTH1   (1 << 9)
 
#define TDR_CTRL_TDR_WIDTH0   (1 << 8)
 
#define TDR_CTRL_TDR_MIN_MODE   (1 << 7)
 
#define TDR_CTRL_RX_THRESHOLD5   (1 << 5)
 
#define TDR_CTRL_RX_THRESHOLD4   (1 << 4)
 
#define TDR_CTRL_RX_THRESHOLD3   (1 << 3)
 
#define TDR_CTRL_RX_THRESHOLD2   (1 << 2)
 
#define TDR_CTRL_RX_THRESHOLD1   (1 << 1)
 
#define TDR_CTRL_RX_THRESHOLD0   (1 << 0)
 
#define TDR_WIN_TDR_START7   (1 << 15)
 
#define TDR_WIN_TDR_START6   (1 << 14)
 
#define TDR_WIN_TDR_START5   (1 << 13)
 
#define TDR_WIN_TDR_START4   (1 << 12)
 
#define TDR_WIN_TDR_START3   (1 << 11)
 
#define TDR_WIN_TDR_START2   (1 << 10)
 
#define TDR_WIN_TDR_START1   (1 << 9)
 
#define TDR_WIN_TDR_START0   (1 << 8)
 
#define TDR_WIN_TDR_STOP7   (1 << 7)
 
#define TDR_WIN_TDR_STOP6   (1 << 6)
 
#define TDR_WIN_TDR_STOP5   (1 << 5)
 
#define TDR_WIN_TDR_STOP4   (1 << 4)
 
#define TDR_WIN_TDR_STOP3   (1 << 3)
 
#define TDR_WIN_TDR_STOP2   (1 << 2)
 
#define TDR_WIN_TDR_STOP1   (1 << 1)
 
#define TDR_WIN_TDR_STOP0   (1 << 0)
 
#define TDR_PEAK_TDR_PEAK5   (1 << 13)
 
#define TDR_PEAK_TDR_PEAK4   (1 << 12)
 
#define TDR_PEAK_TDR_PEAK3   (1 << 11)
 
#define TDR_PEAK_TDR_PEAK2   (1 << 10)
 
#define TDR_PEAK_TDR_PEAK1   (1 << 9)
 
#define TDR_PEAK_TDR_PEAK0   (1 << 8)
 
#define TDR_PEAK_TDR_PEAK_TIME7   (1 << 7)
 
#define TDR_PEAK_TDR_PEAK_TIME6   (1 << 6)
 
#define TDR_PEAK_TDR_PEAK_TIME5   (1 << 5)
 
#define TDR_PEAK_TDR_PEAK_TIME4   (1 << 4)
 
#define TDR_PEAK_TDR_PEAK_TIME3   (1 << 3)
 
#define TDR_PEAK_TDR_PEAK_TIME2   (1 << 2)
 
#define TDR_PEAK_TDR_PEAK_TIME1   (1 << 1)
 
#define TDR_PEAK_TDR_PEAK_TIME0   (1 << 0)
 
#define TDR_THR_TDR_THR_MET   (1 << 8)
 
#define TDR_THR_TDR_THR_TIME7   (1 << 7)
 
#define TDR_THR_TDR_THR_TIME6   (1 << 6)
 
#define TDR_THR_TDR_THR_TIME5   (1 << 5)
 
#define TDR_THR_TDR_THR_TIME4   (1 << 4)
 
#define TDR_THR_TDR_THR_TIME3   (1 << 3)
 
#define TDR_THR_TDR_THR_TIME2   (1 << 2)
 
#define TDR_THR_TDR_THR_TIME1   (1 << 1)
 
#define TDR_THR_TDR_THR_TIME0   (1 << 0)
 
#define VAR_CTRL_VAR_RDY   (1 << 15)
 
#define VAR_CTRL_VAR_FREEZE   (1 << 3)
 
#define VAR_CTRL_VAR_TIMER1   (1 << 2)
 
#define VAR_CTRL_VAR_TIMER0   (1 << 1)
 
#define VAR_CTRL_VAR_ENABLE   (1 << 0)
 
#define LQMR_LQM_ENABLE   (1 << 15)
 
#define LQMR_RESTART_ON_FC   (1 << 14)
 
#define LQMR_RESTART_ON_FREQ   (1 << 13)
 
#define LQMR_RESTART_ON_DBLW   (1 << 12)
 
#define LQMR_RESTART_ON_DAGC   (1 << 11)
 
#define LQMR_RESTART_ON_C1   (1 << 10)
 
#define LQMR_FC_HI_WARN   (1 << 9)
 
#define LQMR_FC_LO_WARN   (1 << 8)
 
#define LQMR_FREQ_HI_WARN   (1 << 7)
 
#define LQMR_FREQ_LO_WARN   (1 << 6)
 
#define LQMR_DBLW_HI_WARN   (1 << 5)
 
#define LQMR_DBLW_LO_WARN   (1 << 4)
 
#define LQMR_DAGC_HI_WARN   (1 << 3)
 
#define LQMR_DAGC_LO_WARN   (1 << 2)
 
#define LQMR_C1_HI_WARN   (1 << 1)
 
#define LQMR_C1_LO_WARN   (1 << 0)
 
#define LQDR_SAMPLE_PARAM   (1 << 13)
 
#define LQDR_WRITE_LQ_THR   (1 << 12)
 
#define LQDR_LQ_PARAM_SEL2   (1 << 11)
 
#define LQDR_LQ_PARAM_SEL1   (1 << 10)
 
#define LQDR_LQ_PARAM_SEL0   (1 << 9)
 
#define LQDR_LQ_THR_SEL   (1 << 8)
 
#define LQDR_LQ_THR_DATA7   (1 << 7)
 
#define LQDR_LQ_THR_DATA6   (1 << 6)
 
#define LQDR_LQ_THR_DATA5   (1 << 5)
 
#define LQDR_LQ_THR_DATA4   (1 << 4)
 
#define LQDR_LQ_THR_DATA3   (1 << 3)
 
#define LQDR_LQ_THR_DATA2   (1 << 2)
 
#define LQDR_LQ_THR_DATA1   (1 << 1)
 
#define LQDR_LQ_THR_DATA0   (1 << 0)
 
#define LQMR2_RESTART_ON_VAR   (1 << 10)
 
#define LQMR2_VAR_HI_WARN   (1 << 1)
 
#define PSF_CFG_MAC_SRC_ADD1   (1 << 12)
 
#define PSF_CFG_MAC_SRC_ADD0   (1 << 11)
 
#define PSF_CFG_MIN_PRE2   (1 << 10)
 
#define PSF_CFG_MIN_PRE1   (1 << 9)
 
#define PSF_CFG_MIN_PRE0   (1 << 8)
 
#define PSF_CFG_PSF_ENDIAN   (1 << 7)
 
#define PSF_CFG_PSF_IPV4   (1 << 6)
 
#define PSF_CFG_PSF_PCF_RD   (1 << 5)
 
#define PSF_CFG_PSF_ERR_EN   (1 << 4)
 

Functions

error_t dp83620Init (NetInterface *interface)
 DP83620 PHY transceiver initialization. More...
 
void dp83620Tick (NetInterface *interface)
 DP83620 timer handler. More...
 
void dp83620EnableIrq (NetInterface *interface)
 Enable interrupts. More...
 
void dp83620DisableIrq (NetInterface *interface)
 Disable interrupts. More...
 
void dp83620EventHandler (NetInterface *interface)
 DP83620 event handler. More...
 
void dp83620WritePhyReg (NetInterface *interface, uint8_t address, uint16_t data)
 Write PHY register. More...
 
uint16_t dp83620ReadPhyReg (NetInterface *interface, uint8_t address)
 Read PHY register. More...
 
void dp83620DumpPhyReg (NetInterface *interface)
 Dump PHY registers for debugging purpose. More...
 

Variables

const PhyDriver dp83620PhyDriver
 DP83620 Ethernet PHY driver. More...
 

Detailed Description

DP83620 Ethernet PHY transceiver.

License

Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author
Oryx Embedded SARL (www.oryx-embedded.com)
Version
1.9.0

Definition in file dp83620_driver.h.

Macro Definition Documentation

◆ _10BTSCR_10BT_SCALE_MSB

#define _10BTSCR_10BT_SCALE_MSB   (1 << 2)

Definition at line 310 of file dp83620_driver.h.

◆ _10BTSCR_10BT_SERIAL

#define _10BTSCR_10BT_SERIAL   (1 << 15)

Definition at line 301 of file dp83620_driver.h.

◆ _10BTSCR_AUTOPOL_DIS

#define _10BTSCR_AUTOPOL_DIS   (1 << 3)

Definition at line 309 of file dp83620_driver.h.

◆ _10BTSCR_FORCE_LINK_10

#define _10BTSCR_FORCE_LINK_10   (1 << 6)

Definition at line 307 of file dp83620_driver.h.

◆ _10BTSCR_HEARTBEAT_DIS

#define _10BTSCR_HEARTBEAT_DIS   (1 << 1)

Definition at line 311 of file dp83620_driver.h.

◆ _10BTSCR_JABBER_DIS

#define _10BTSCR_JABBER_DIS   (1 << 0)

Definition at line 312 of file dp83620_driver.h.

◆ _10BTSCR_LOOPBACK_10_DIS

#define _10BTSCR_LOOPBACK_10_DIS   (1 << 8)

Definition at line 305 of file dp83620_driver.h.

◆ _10BTSCR_LP_DIS

#define _10BTSCR_LP_DIS   (1 << 7)

Definition at line 306 of file dp83620_driver.h.

◆ _10BTSCR_POLARITY

#define _10BTSCR_POLARITY   (1 << 4)

Definition at line 308 of file dp83620_driver.h.

◆ _10BTSCR_SQUELCH0

#define _10BTSCR_SQUELCH0   (1 << 9)

Definition at line 304 of file dp83620_driver.h.

◆ _10BTSCR_SQUELCH1

#define _10BTSCR_SQUELCH1   (1 << 10)

Definition at line 303 of file dp83620_driver.h.

◆ _10BTSCR_SQUELCH2

#define _10BTSCR_SQUELCH2   (1 << 11)

Definition at line 302 of file dp83620_driver.h.

◆ ANAR_100BT4

#define ANAR_100BT4   (1 << 9)

Definition at line 120 of file dp83620_driver.h.

◆ ANAR_100BTX

#define ANAR_100BTX   (1 << 7)

Definition at line 122 of file dp83620_driver.h.

◆ ANAR_100BTX_FD

#define ANAR_100BTX_FD   (1 << 8)

Definition at line 121 of file dp83620_driver.h.

◆ ANAR_10BT

#define ANAR_10BT   (1 << 5)

Definition at line 124 of file dp83620_driver.h.

◆ ANAR_10BT_FD

#define ANAR_10BT_FD   (1 << 6)

Definition at line 123 of file dp83620_driver.h.

◆ ANAR_ASM_DIR

#define ANAR_ASM_DIR   (1 << 11)

Definition at line 118 of file dp83620_driver.h.

◆ ANAR_NP

#define ANAR_NP   (1 << 15)

Definition at line 116 of file dp83620_driver.h.

◆ ANAR_PAUSE

#define ANAR_PAUSE   (1 << 10)

Definition at line 119 of file dp83620_driver.h.

◆ ANAR_RF

#define ANAR_RF   (1 << 13)

Definition at line 117 of file dp83620_driver.h.

◆ ANAR_SELECTOR0

#define ANAR_SELECTOR0   (1 << 0)

Definition at line 129 of file dp83620_driver.h.

◆ ANAR_SELECTOR1

#define ANAR_SELECTOR1   (1 << 1)

Definition at line 128 of file dp83620_driver.h.

◆ ANAR_SELECTOR2

#define ANAR_SELECTOR2   (1 << 2)

Definition at line 127 of file dp83620_driver.h.

◆ ANAR_SELECTOR3

#define ANAR_SELECTOR3   (1 << 3)

Definition at line 126 of file dp83620_driver.h.

◆ ANAR_SELECTOR4

#define ANAR_SELECTOR4   (1 << 4)

Definition at line 125 of file dp83620_driver.h.

◆ ANER_LP_AN_ABLE

#define ANER_LP_AN_ABLE   (1 << 0)

Definition at line 153 of file dp83620_driver.h.

◆ ANER_LP_NP_ABLE

#define ANER_LP_NP_ABLE   (1 << 3)

Definition at line 150 of file dp83620_driver.h.

◆ ANER_NP_ABLE

#define ANER_NP_ABLE   (1 << 2)

Definition at line 151 of file dp83620_driver.h.

◆ ANER_PAGE_RX

#define ANER_PAGE_RX   (1 << 1)

Definition at line 152 of file dp83620_driver.h.

◆ ANER_PDF

#define ANER_PDF   (1 << 4)

Definition at line 149 of file dp83620_driver.h.

◆ ANLPAR_100BT4

#define ANLPAR_100BT4   (1 << 9)

Definition at line 137 of file dp83620_driver.h.

◆ ANLPAR_100BTX

#define ANLPAR_100BTX   (1 << 7)

Definition at line 139 of file dp83620_driver.h.

◆ ANLPAR_100BTX_FD

#define ANLPAR_100BTX_FD   (1 << 8)

Definition at line 138 of file dp83620_driver.h.

◆ ANLPAR_10BT

#define ANLPAR_10BT   (1 << 5)

Definition at line 141 of file dp83620_driver.h.

◆ ANLPAR_10BT_FD

#define ANLPAR_10BT_FD   (1 << 6)

Definition at line 140 of file dp83620_driver.h.

◆ ANLPAR_ACK

#define ANLPAR_ACK   (1 << 14)

Definition at line 133 of file dp83620_driver.h.

◆ ANLPAR_ASM_DIR

#define ANLPAR_ASM_DIR   (1 << 11)

Definition at line 135 of file dp83620_driver.h.

◆ ANLPAR_NP

#define ANLPAR_NP   (1 << 15)

Definition at line 132 of file dp83620_driver.h.

◆ ANLPAR_PAUSE

#define ANLPAR_PAUSE   (1 << 10)

Definition at line 136 of file dp83620_driver.h.

◆ ANLPAR_RF

#define ANLPAR_RF   (1 << 13)

Definition at line 134 of file dp83620_driver.h.

◆ ANLPAR_SELECTOR0

#define ANLPAR_SELECTOR0   (1 << 0)

Definition at line 146 of file dp83620_driver.h.

◆ ANLPAR_SELECTOR1

#define ANLPAR_SELECTOR1   (1 << 1)

Definition at line 145 of file dp83620_driver.h.

◆ ANLPAR_SELECTOR2

#define ANLPAR_SELECTOR2   (1 << 2)

Definition at line 144 of file dp83620_driver.h.

◆ ANLPAR_SELECTOR3

#define ANLPAR_SELECTOR3   (1 << 3)

Definition at line 143 of file dp83620_driver.h.

◆ ANLPAR_SELECTOR4

#define ANLPAR_SELECTOR4   (1 << 4)

Definition at line 142 of file dp83620_driver.h.

◆ ANNPTR_ACK2

#define ANNPTR_ACK2   (1 << 12)

Definition at line 158 of file dp83620_driver.h.

◆ ANNPTR_CODE0

#define ANNPTR_CODE0   (1 << 0)

Definition at line 170 of file dp83620_driver.h.

◆ ANNPTR_CODE1

#define ANNPTR_CODE1   (1 << 1)

Definition at line 169 of file dp83620_driver.h.

◆ ANNPTR_CODE10

#define ANNPTR_CODE10   (1 << 10)

Definition at line 160 of file dp83620_driver.h.

◆ ANNPTR_CODE2

#define ANNPTR_CODE2   (1 << 2)

Definition at line 168 of file dp83620_driver.h.

◆ ANNPTR_CODE3

#define ANNPTR_CODE3   (1 << 3)

Definition at line 167 of file dp83620_driver.h.

◆ ANNPTR_CODE4

#define ANNPTR_CODE4   (1 << 4)

Definition at line 166 of file dp83620_driver.h.

◆ ANNPTR_CODE5

#define ANNPTR_CODE5   (1 << 5)

Definition at line 165 of file dp83620_driver.h.

◆ ANNPTR_CODE6

#define ANNPTR_CODE6   (1 << 6)

Definition at line 164 of file dp83620_driver.h.

◆ ANNPTR_CODE7

#define ANNPTR_CODE7   (1 << 7)

Definition at line 163 of file dp83620_driver.h.

◆ ANNPTR_CODE8

#define ANNPTR_CODE8   (1 << 8)

Definition at line 162 of file dp83620_driver.h.

◆ ANNPTR_CODE9

#define ANNPTR_CODE9   (1 << 9)

Definition at line 161 of file dp83620_driver.h.

◆ ANNPTR_MP

#define ANNPTR_MP   (1 << 13)

Definition at line 157 of file dp83620_driver.h.

◆ ANNPTR_NP

#define ANNPTR_NP   (1 << 15)

Definition at line 156 of file dp83620_driver.h.

◆ ANNPTR_TOG_TX

#define ANNPTR_TOG_TX   (1 << 11)

Definition at line 159 of file dp83620_driver.h.

◆ BMCR_AN_EN

#define BMCR_AN_EN   (1 << 12)

Definition at line 92 of file dp83620_driver.h.

◆ BMCR_COL_TEST

#define BMCR_COL_TEST   (1 << 7)

Definition at line 97 of file dp83620_driver.h.

◆ BMCR_DUPLEX_MODE

#define BMCR_DUPLEX_MODE   (1 << 8)

Definition at line 96 of file dp83620_driver.h.

◆ BMCR_ISOLATE

#define BMCR_ISOLATE   (1 << 10)

Definition at line 94 of file dp83620_driver.h.

◆ BMCR_LOOPBACK

#define BMCR_LOOPBACK   (1 << 14)

Definition at line 90 of file dp83620_driver.h.

◆ BMCR_POWER_DOWN

#define BMCR_POWER_DOWN   (1 << 11)

Definition at line 93 of file dp83620_driver.h.

◆ BMCR_RESET

#define BMCR_RESET   (1 << 15)

Definition at line 89 of file dp83620_driver.h.

◆ BMCR_RESTART_AN

#define BMCR_RESTART_AN   (1 << 9)

Definition at line 95 of file dp83620_driver.h.

◆ BMCR_SPEED_SEL

#define BMCR_SPEED_SEL   (1 << 13)

Definition at line 91 of file dp83620_driver.h.

◆ BMCR_UNIDIRECTIONAL_EN

#define BMCR_UNIDIRECTIONAL_EN   (1 << 5)

Definition at line 98 of file dp83620_driver.h.

◆ BMSR_100BT4

#define BMSR_100BT4   (1 << 15)

Definition at line 101 of file dp83620_driver.h.

◆ BMSR_100BTX

#define BMSR_100BTX   (1 << 13)

Definition at line 103 of file dp83620_driver.h.

◆ BMSR_100BTX_FD

#define BMSR_100BTX_FD   (1 << 14)

Definition at line 102 of file dp83620_driver.h.

◆ BMSR_10BT

#define BMSR_10BT   (1 << 11)

Definition at line 105 of file dp83620_driver.h.

◆ BMSR_10BT_FD

#define BMSR_10BT_FD   (1 << 12)

Definition at line 104 of file dp83620_driver.h.

◆ BMSR_AN_ABLE

#define BMSR_AN_ABLE   (1 << 3)

Definition at line 110 of file dp83620_driver.h.

◆ BMSR_AN_COMPLETE

#define BMSR_AN_COMPLETE   (1 << 5)

Definition at line 108 of file dp83620_driver.h.

◆ BMSR_EXTENDED_CAP

#define BMSR_EXTENDED_CAP   (1 << 0)

Definition at line 113 of file dp83620_driver.h.

◆ BMSR_JABBER_DETECT

#define BMSR_JABBER_DETECT   (1 << 1)

Definition at line 112 of file dp83620_driver.h.

◆ BMSR_LINK_STATUS

#define BMSR_LINK_STATUS   (1 << 2)

Definition at line 111 of file dp83620_driver.h.

◆ BMSR_NO_PREAMBLE

#define BMSR_NO_PREAMBLE   (1 << 6)

Definition at line 107 of file dp83620_driver.h.

◆ BMSR_REMOTE_FAULT

#define BMSR_REMOTE_FAULT   (1 << 4)

Definition at line 109 of file dp83620_driver.h.

◆ BMSR_UNIDIRECTIONAL_ABLE

#define BMSR_UNIDIRECTIONAL_ABLE   (1 << 7)

Definition at line 106 of file dp83620_driver.h.

◆ CDCTRL1_BIST_CONT

#define CDCTRL1_BIST_CONT   (1 << 5)

Definition at line 324 of file dp83620_driver.h.

◆ CDCTRL1_BIST_ERROR_COUNT0

#define CDCTRL1_BIST_ERROR_COUNT0   (1 << 8)

Definition at line 322 of file dp83620_driver.h.

◆ CDCTRL1_BIST_ERROR_COUNT1

#define CDCTRL1_BIST_ERROR_COUNT1   (1 << 9)

Definition at line 321 of file dp83620_driver.h.

◆ CDCTRL1_BIST_ERROR_COUNT2

#define CDCTRL1_BIST_ERROR_COUNT2   (1 << 10)

Definition at line 320 of file dp83620_driver.h.

◆ CDCTRL1_BIST_ERROR_COUNT3

#define CDCTRL1_BIST_ERROR_COUNT3   (1 << 11)

Definition at line 319 of file dp83620_driver.h.

◆ CDCTRL1_BIST_ERROR_COUNT4

#define CDCTRL1_BIST_ERROR_COUNT4   (1 << 12)

Definition at line 318 of file dp83620_driver.h.

◆ CDCTRL1_BIST_ERROR_COUNT5

#define CDCTRL1_BIST_ERROR_COUNT5   (1 << 13)

Definition at line 317 of file dp83620_driver.h.

◆ CDCTRL1_BIST_ERROR_COUNT6

#define CDCTRL1_BIST_ERROR_COUNT6   (1 << 14)

Definition at line 316 of file dp83620_driver.h.

◆ CDCTRL1_BIST_ERROR_COUNT7

#define CDCTRL1_BIST_ERROR_COUNT7   (1 << 15)

Definition at line 315 of file dp83620_driver.h.

◆ CDCTRL1_CDPATTEN_10

#define CDCTRL1_CDPATTEN_10   (1 << 4)

Definition at line 325 of file dp83620_driver.h.

◆ CDCTRL1_CDPATTSEL0

#define CDCTRL1_CDPATTSEL0   (1 << 0)

Definition at line 329 of file dp83620_driver.h.

◆ CDCTRL1_CDPATTSEL1

#define CDCTRL1_CDPATTSEL1   (1 << 1)

Definition at line 328 of file dp83620_driver.h.

◆ CDCTRL1_MDIO_PULL_EN

#define CDCTRL1_MDIO_PULL_EN   (1 << 3)

Definition at line 326 of file dp83620_driver.h.

◆ CDCTRL1_MII_CLOCK_EN

#define CDCTRL1_MII_CLOCK_EN   (1 << 6)

Definition at line 323 of file dp83620_driver.h.

◆ CDCTRL1_PATT_GAP_10M

#define CDCTRL1_PATT_GAP_10M   (1 << 2)

Definition at line 327 of file dp83620_driver.h.

◆ DP83620_PHY_ADDR

#define DP83620_PHY_ADDR   1

Definition at line 37 of file dp83620_driver.h.

◆ DP83620_PHY_REG_10BTSCR

#define DP83620_PHY_REG_10BTSCR   0x1A

Definition at line 63 of file dp83620_driver.h.

◆ DP83620_PHY_REG_ANAR

#define DP83620_PHY_REG_ANAR   0x04

Definition at line 47 of file dp83620_driver.h.

◆ DP83620_PHY_REG_ANER

#define DP83620_PHY_REG_ANER   0x06

Definition at line 49 of file dp83620_driver.h.

◆ DP83620_PHY_REG_ANLPAR

#define DP83620_PHY_REG_ANLPAR   0x05

Definition at line 48 of file dp83620_driver.h.

◆ DP83620_PHY_REG_ANNPTR

#define DP83620_PHY_REG_ANNPTR   0x07

Definition at line 50 of file dp83620_driver.h.

◆ DP83620_PHY_REG_BMCR

#define DP83620_PHY_REG_BMCR   0x00

Definition at line 43 of file dp83620_driver.h.

◆ DP83620_PHY_REG_BMSR

#define DP83620_PHY_REG_BMSR   0x01

Definition at line 44 of file dp83620_driver.h.

◆ DP83620_PHY_REG_CDCTRL1

#define DP83620_PHY_REG_CDCTRL1   0x1B

Definition at line 64 of file dp83620_driver.h.

◆ DP83620_PHY_REG_EDCR

#define DP83620_PHY_REG_EDCR   0x1D

Definition at line 66 of file dp83620_driver.h.

◆ DP83620_PHY_REG_FCSCR

#define DP83620_PHY_REG_FCSCR   0x14

Definition at line 57 of file dp83620_driver.h.

◆ DP83620_PHY_REG_FREQ100

#define DP83620_PHY_REG_FREQ100   0x15

Definition at line 74 of file dp83620_driver.h.

◆ DP83620_PHY_REG_LEDCR

#define DP83620_PHY_REG_LEDCR   0x18

Definition at line 61 of file dp83620_driver.h.

◆ DP83620_PHY_REG_LEN100_DET

#define DP83620_PHY_REG_LEN100_DET   0x14

Definition at line 73 of file dp83620_driver.h.

◆ DP83620_PHY_REG_LQDR

#define DP83620_PHY_REG_LQDR   0x1E

Definition at line 82 of file dp83620_driver.h.

◆ DP83620_PHY_REG_LQMR

#define DP83620_PHY_REG_LQMR   0x1D

Definition at line 81 of file dp83620_driver.h.

◆ DP83620_PHY_REG_LQMR2

#define DP83620_PHY_REG_LQMR2   0x1F

Definition at line 83 of file dp83620_driver.h.

◆ DP83620_PHY_REG_MICR

#define DP83620_PHY_REG_MICR   0x11

Definition at line 52 of file dp83620_driver.h.

◆ DP83620_PHY_REG_MISR

#define DP83620_PHY_REG_MISR   0x12

Definition at line 53 of file dp83620_driver.h.

◆ DP83620_PHY_REG_PAGESEL

#define DP83620_PHY_REG_PAGESEL   0x13

Definition at line 54 of file dp83620_driver.h.

◆ DP83620_PHY_REG_PCFCR

#define DP83620_PHY_REG_PCFCR   0x1F

Definition at line 67 of file dp83620_driver.h.

◆ DP83620_PHY_REG_PCSR

#define DP83620_PHY_REG_PCSR   0x16

Definition at line 59 of file dp83620_driver.h.

◆ DP83620_PHY_REG_PHYCR

#define DP83620_PHY_REG_PHYCR   0x19

Definition at line 62 of file dp83620_driver.h.

◆ DP83620_PHY_REG_PHYCR2

#define DP83620_PHY_REG_PHYCR2   0x1C

Definition at line 65 of file dp83620_driver.h.

◆ DP83620_PHY_REG_PHYIDR1

#define DP83620_PHY_REG_PHYIDR1   0x02

Definition at line 45 of file dp83620_driver.h.

◆ DP83620_PHY_REG_PHYIDR2

#define DP83620_PHY_REG_PHYIDR2   0x03

Definition at line 46 of file dp83620_driver.h.

◆ DP83620_PHY_REG_PHYSTS

#define DP83620_PHY_REG_PHYSTS   0x10

Definition at line 51 of file dp83620_driver.h.

◆ DP83620_PHY_REG_PSF_CFG

#define DP83620_PHY_REG_PSF_CFG   0x18

Definition at line 86 of file dp83620_driver.h.

◆ DP83620_PHY_REG_RBR

#define DP83620_PHY_REG_RBR   0x17

Definition at line 60 of file dp83620_driver.h.

◆ DP83620_PHY_REG_RECR

#define DP83620_PHY_REG_RECR   0x15

Definition at line 58 of file dp83620_driver.h.

◆ DP83620_PHY_REG_SD_CNFG

#define DP83620_PHY_REG_SD_CNFG   0x1E

Definition at line 70 of file dp83620_driver.h.

◆ DP83620_PHY_REG_TDR_CTRL

#define DP83620_PHY_REG_TDR_CTRL   0x16

Definition at line 75 of file dp83620_driver.h.

◆ DP83620_PHY_REG_TDR_PEAK

#define DP83620_PHY_REG_TDR_PEAK   0x18

Definition at line 77 of file dp83620_driver.h.

◆ DP83620_PHY_REG_TDR_THR

#define DP83620_PHY_REG_TDR_THR   0x19

Definition at line 78 of file dp83620_driver.h.

◆ DP83620_PHY_REG_TDR_WIN

#define DP83620_PHY_REG_TDR_WIN   0x17

Definition at line 76 of file dp83620_driver.h.

◆ DP83620_PHY_REG_VAR_CTRL

#define DP83620_PHY_REG_VAR_CTRL   0x1A

Definition at line 79 of file dp83620_driver.h.

◆ DP83620_PHY_REG_VAR_DAT

#define DP83620_PHY_REG_VAR_DAT   0x1B

Definition at line 80 of file dp83620_driver.h.

◆ EDCR_ED_AUTO_DOWN

#define EDCR_ED_AUTO_DOWN   (1 << 13)

Definition at line 342 of file dp83620_driver.h.

◆ EDCR_ED_AUTO_UP

#define EDCR_ED_AUTO_UP   (1 << 14)

Definition at line 341 of file dp83620_driver.h.

◆ EDCR_ED_BURST_DIS

#define EDCR_ED_BURST_DIS   (1 << 11)

Definition at line 344 of file dp83620_driver.h.

◆ EDCR_ED_DATA_COUNT0

#define EDCR_ED_DATA_COUNT0   (1 << 0)

Definition at line 355 of file dp83620_driver.h.

◆ EDCR_ED_DATA_COUNT1

#define EDCR_ED_DATA_COUNT1   (1 << 1)

Definition at line 354 of file dp83620_driver.h.

◆ EDCR_ED_DATA_COUNT2

#define EDCR_ED_DATA_COUNT2   (1 << 2)

Definition at line 353 of file dp83620_driver.h.

◆ EDCR_ED_DATA_COUNT3

#define EDCR_ED_DATA_COUNT3   (1 << 3)

Definition at line 352 of file dp83620_driver.h.

◆ EDCR_ED_DATA_MET

#define EDCR_ED_DATA_MET   (1 << 8)

Definition at line 347 of file dp83620_driver.h.

◆ EDCR_ED_EN

#define EDCR_ED_EN   (1 << 15)

Definition at line 340 of file dp83620_driver.h.

◆ EDCR_ED_ERR_COUNT0

#define EDCR_ED_ERR_COUNT0   (1 << 4)

Definition at line 351 of file dp83620_driver.h.

◆ EDCR_ED_ERR_COUNT1

#define EDCR_ED_ERR_COUNT1   (1 << 5)

Definition at line 350 of file dp83620_driver.h.

◆ EDCR_ED_ERR_COUNT2

#define EDCR_ED_ERR_COUNT2   (1 << 6)

Definition at line 349 of file dp83620_driver.h.

◆ EDCR_ED_ERR_COUNT3

#define EDCR_ED_ERR_COUNT3   (1 << 7)

Definition at line 348 of file dp83620_driver.h.

◆ EDCR_ED_ERR_MET

#define EDCR_ED_ERR_MET   (1 << 9)

Definition at line 346 of file dp83620_driver.h.

◆ EDCR_ED_MAN

#define EDCR_ED_MAN   (1 << 12)

Definition at line 343 of file dp83620_driver.h.

◆ EDCR_ED_PWR_STATE

#define EDCR_ED_PWR_STATE   (1 << 10)

Definition at line 345 of file dp83620_driver.h.

◆ FCSCR_FCSCNT0

#define FCSCR_FCSCNT0   (1 << 0)

Definition at line 224 of file dp83620_driver.h.

◆ FCSCR_FCSCNT1

#define FCSCR_FCSCNT1   (1 << 1)

Definition at line 223 of file dp83620_driver.h.

◆ FCSCR_FCSCNT2

#define FCSCR_FCSCNT2   (1 << 2)

Definition at line 222 of file dp83620_driver.h.

◆ FCSCR_FCSCNT3

#define FCSCR_FCSCNT3   (1 << 3)

Definition at line 221 of file dp83620_driver.h.

◆ FCSCR_FCSCNT4

#define FCSCR_FCSCNT4   (1 << 4)

Definition at line 220 of file dp83620_driver.h.

◆ FCSCR_FCSCNT5

#define FCSCR_FCSCNT5   (1 << 5)

Definition at line 219 of file dp83620_driver.h.

◆ FCSCR_FCSCNT6

#define FCSCR_FCSCNT6   (1 << 6)

Definition at line 218 of file dp83620_driver.h.

◆ FCSCR_FCSCNT7

#define FCSCR_FCSCNT7   (1 << 7)

Definition at line 217 of file dp83620_driver.h.

◆ FREQ100_FREQ_OFFSET0

#define FREQ100_FREQ_OFFSET0   (1 << 0)

Definition at line 393 of file dp83620_driver.h.

◆ FREQ100_FREQ_OFFSET1

#define FREQ100_FREQ_OFFSET1   (1 << 1)

Definition at line 392 of file dp83620_driver.h.

◆ FREQ100_FREQ_OFFSET2

#define FREQ100_FREQ_OFFSET2   (1 << 2)

Definition at line 391 of file dp83620_driver.h.

◆ FREQ100_FREQ_OFFSET3

#define FREQ100_FREQ_OFFSET3   (1 << 3)

Definition at line 390 of file dp83620_driver.h.

◆ FREQ100_FREQ_OFFSET4

#define FREQ100_FREQ_OFFSET4   (1 << 4)

Definition at line 389 of file dp83620_driver.h.

◆ FREQ100_FREQ_OFFSET5

#define FREQ100_FREQ_OFFSET5   (1 << 5)

Definition at line 388 of file dp83620_driver.h.

◆ FREQ100_FREQ_OFFSET6

#define FREQ100_FREQ_OFFSET6   (1 << 6)

Definition at line 387 of file dp83620_driver.h.

◆ FREQ100_FREQ_OFFSET7

#define FREQ100_FREQ_OFFSET7   (1 << 7)

Definition at line 386 of file dp83620_driver.h.

◆ FREQ100_SAMPLE_FREQ

#define FREQ100_SAMPLE_FREQ   (1 << 15)

Definition at line 384 of file dp83620_driver.h.

◆ FREQ100_SEL_FC

#define FREQ100_SEL_FC   (1 << 8)

Definition at line 385 of file dp83620_driver.h.

◆ LEDCR_ACTLED

#define LEDCR_ACTLED   (1 << 0)

Definition at line 275 of file dp83620_driver.h.

◆ LEDCR_BLINK_FREQ0

#define LEDCR_BLINK_FREQ0   (1 << 6)

Definition at line 269 of file dp83620_driver.h.

◆ LEDCR_BLINK_FREQ1

#define LEDCR_BLINK_FREQ1   (1 << 7)

Definition at line 268 of file dp83620_driver.h.

◆ LEDCR_BLINK_FREQ_12HZ

#define LEDCR_BLINK_FREQ_12HZ   (1 << 6)

Definition at line 278 of file dp83620_driver.h.

◆ LEDCR_BLINK_FREQ_24HZ

#define LEDCR_BLINK_FREQ_24HZ   (2 << 6)

Definition at line 279 of file dp83620_driver.h.

◆ LEDCR_BLINK_FREQ_48HZ

#define LEDCR_BLINK_FREQ_48HZ   (3 << 6)

Definition at line 280 of file dp83620_driver.h.

◆ LEDCR_BLINK_FREQ_6HZ

#define LEDCR_BLINK_FREQ_6HZ   (0 << 6)

Definition at line 277 of file dp83620_driver.h.

◆ LEDCR_DIS_ACTLED

#define LEDCR_DIS_ACTLED   (1 << 9)

Definition at line 266 of file dp83620_driver.h.

◆ LEDCR_DIS_LNKLED

#define LEDCR_DIS_LNKLED   (1 << 10)

Definition at line 265 of file dp83620_driver.h.

◆ LEDCR_DIS_SPDLED

#define LEDCR_DIS_SPDLED   (1 << 11)

Definition at line 264 of file dp83620_driver.h.

◆ LEDCR_DRV_ACTLED

#define LEDCR_DRV_ACTLED   (1 << 3)

Definition at line 272 of file dp83620_driver.h.

◆ LEDCR_DRV_LNKLED

#define LEDCR_DRV_LNKLED   (1 << 4)

Definition at line 271 of file dp83620_driver.h.

◆ LEDCR_DRV_SPDLED

#define LEDCR_DRV_SPDLED   (1 << 5)

Definition at line 270 of file dp83620_driver.h.

◆ LEDCR_LEDACT_RX

#define LEDCR_LEDACT_RX   (1 << 8)

Definition at line 267 of file dp83620_driver.h.

◆ LEDCR_LNKLED

#define LEDCR_LNKLED   (1 << 1)

Definition at line 274 of file dp83620_driver.h.

◆ LEDCR_SPDLED

#define LEDCR_SPDLED   (1 << 2)

Definition at line 273 of file dp83620_driver.h.

◆ LEN100_DET_CABLE_LEN0

#define LEN100_DET_CABLE_LEN0   (1 << 0)

Definition at line 381 of file dp83620_driver.h.

◆ LEN100_DET_CABLE_LEN1

#define LEN100_DET_CABLE_LEN1   (1 << 1)

Definition at line 380 of file dp83620_driver.h.

◆ LEN100_DET_CABLE_LEN2

#define LEN100_DET_CABLE_LEN2   (1 << 2)

Definition at line 379 of file dp83620_driver.h.

◆ LEN100_DET_CABLE_LEN3

#define LEN100_DET_CABLE_LEN3   (1 << 3)

Definition at line 378 of file dp83620_driver.h.

◆ LEN100_DET_CABLE_LEN4

#define LEN100_DET_CABLE_LEN4   (1 << 4)

Definition at line 377 of file dp83620_driver.h.

◆ LEN100_DET_CABLE_LEN5

#define LEN100_DET_CABLE_LEN5   (1 << 5)

Definition at line 376 of file dp83620_driver.h.

◆ LEN100_DET_CABLE_LEN6

#define LEN100_DET_CABLE_LEN6   (1 << 6)

Definition at line 375 of file dp83620_driver.h.

◆ LEN100_DET_CABLE_LEN7

#define LEN100_DET_CABLE_LEN7   (1 << 7)

Definition at line 374 of file dp83620_driver.h.

◆ LQDR_LQ_PARAM_SEL0

#define LQDR_LQ_PARAM_SEL0   (1 << 9)

Definition at line 487 of file dp83620_driver.h.

◆ LQDR_LQ_PARAM_SEL1

#define LQDR_LQ_PARAM_SEL1   (1 << 10)

Definition at line 486 of file dp83620_driver.h.

◆ LQDR_LQ_PARAM_SEL2

#define LQDR_LQ_PARAM_SEL2   (1 << 11)

Definition at line 485 of file dp83620_driver.h.

◆ LQDR_LQ_THR_DATA0

#define LQDR_LQ_THR_DATA0   (1 << 0)

Definition at line 496 of file dp83620_driver.h.

◆ LQDR_LQ_THR_DATA1

#define LQDR_LQ_THR_DATA1   (1 << 1)

Definition at line 495 of file dp83620_driver.h.

◆ LQDR_LQ_THR_DATA2

#define LQDR_LQ_THR_DATA2   (1 << 2)

Definition at line 494 of file dp83620_driver.h.

◆ LQDR_LQ_THR_DATA3

#define LQDR_LQ_THR_DATA3   (1 << 3)

Definition at line 493 of file dp83620_driver.h.

◆ LQDR_LQ_THR_DATA4

#define LQDR_LQ_THR_DATA4   (1 << 4)

Definition at line 492 of file dp83620_driver.h.

◆ LQDR_LQ_THR_DATA5

#define LQDR_LQ_THR_DATA5   (1 << 5)

Definition at line 491 of file dp83620_driver.h.

◆ LQDR_LQ_THR_DATA6

#define LQDR_LQ_THR_DATA6   (1 << 6)

Definition at line 490 of file dp83620_driver.h.

◆ LQDR_LQ_THR_DATA7

#define LQDR_LQ_THR_DATA7   (1 << 7)

Definition at line 489 of file dp83620_driver.h.

◆ LQDR_LQ_THR_SEL

#define LQDR_LQ_THR_SEL   (1 << 8)

Definition at line 488 of file dp83620_driver.h.

◆ LQDR_SAMPLE_PARAM

#define LQDR_SAMPLE_PARAM   (1 << 13)

Definition at line 483 of file dp83620_driver.h.

◆ LQDR_WRITE_LQ_THR

#define LQDR_WRITE_LQ_THR   (1 << 12)

Definition at line 484 of file dp83620_driver.h.

◆ LQMR2_RESTART_ON_VAR

#define LQMR2_RESTART_ON_VAR   (1 << 10)

Definition at line 499 of file dp83620_driver.h.

◆ LQMR2_VAR_HI_WARN

#define LQMR2_VAR_HI_WARN   (1 << 1)

Definition at line 500 of file dp83620_driver.h.

◆ LQMR_C1_HI_WARN

#define LQMR_C1_HI_WARN   (1 << 1)

Definition at line 479 of file dp83620_driver.h.

◆ LQMR_C1_LO_WARN

#define LQMR_C1_LO_WARN   (1 << 0)

Definition at line 480 of file dp83620_driver.h.

◆ LQMR_DAGC_HI_WARN

#define LQMR_DAGC_HI_WARN   (1 << 3)

Definition at line 477 of file dp83620_driver.h.

◆ LQMR_DAGC_LO_WARN

#define LQMR_DAGC_LO_WARN   (1 << 2)

Definition at line 478 of file dp83620_driver.h.

◆ LQMR_DBLW_HI_WARN

#define LQMR_DBLW_HI_WARN   (1 << 5)

Definition at line 475 of file dp83620_driver.h.

◆ LQMR_DBLW_LO_WARN

#define LQMR_DBLW_LO_WARN   (1 << 4)

Definition at line 476 of file dp83620_driver.h.

◆ LQMR_FC_HI_WARN

#define LQMR_FC_HI_WARN   (1 << 9)

Definition at line 471 of file dp83620_driver.h.

◆ LQMR_FC_LO_WARN

#define LQMR_FC_LO_WARN   (1 << 8)

Definition at line 472 of file dp83620_driver.h.

◆ LQMR_FREQ_HI_WARN

#define LQMR_FREQ_HI_WARN   (1 << 7)

Definition at line 473 of file dp83620_driver.h.

◆ LQMR_FREQ_LO_WARN

#define LQMR_FREQ_LO_WARN   (1 << 6)

Definition at line 474 of file dp83620_driver.h.

◆ LQMR_LQM_ENABLE

#define LQMR_LQM_ENABLE   (1 << 15)

Definition at line 465 of file dp83620_driver.h.

◆ LQMR_RESTART_ON_C1

#define LQMR_RESTART_ON_C1   (1 << 10)

Definition at line 470 of file dp83620_driver.h.

◆ LQMR_RESTART_ON_DAGC

#define LQMR_RESTART_ON_DAGC   (1 << 11)

Definition at line 469 of file dp83620_driver.h.

◆ LQMR_RESTART_ON_DBLW

#define LQMR_RESTART_ON_DBLW   (1 << 12)

Definition at line 468 of file dp83620_driver.h.

◆ LQMR_RESTART_ON_FC

#define LQMR_RESTART_ON_FC   (1 << 14)

Definition at line 466 of file dp83620_driver.h.

◆ LQMR_RESTART_ON_FREQ

#define LQMR_RESTART_ON_FREQ   (1 << 13)

Definition at line 467 of file dp83620_driver.h.

◆ MICR_INT_OE

#define MICR_INT_OE   (1 << 0)

Definition at line 192 of file dp83620_driver.h.

◆ MICR_INTEN

#define MICR_INTEN   (1 << 1)

Definition at line 191 of file dp83620_driver.h.

◆ MICR_TINT

#define MICR_TINT   (1 << 2)

Definition at line 190 of file dp83620_driver.h.

◆ MISR_ANC_INT

#define MISR_ANC_INT   (1 << 10)

Definition at line 199 of file dp83620_driver.h.

◆ MISR_ANC_INT_EN

#define MISR_ANC_INT_EN   (1 << 2)

Definition at line 207 of file dp83620_driver.h.

◆ MISR_DUP_INT

#define MISR_DUP_INT   (1 << 11)

Definition at line 198 of file dp83620_driver.h.

◆ MISR_DUP_INT_EN

#define MISR_DUP_INT_EN   (1 << 3)

Definition at line 206 of file dp83620_driver.h.

◆ MISR_ED_INT

#define MISR_ED_INT   (1 << 14)

Definition at line 195 of file dp83620_driver.h.

◆ MISR_ED_INT_EN

#define MISR_ED_INT_EN   (1 << 6)

Definition at line 203 of file dp83620_driver.h.

◆ MISR_FHF_INT

#define MISR_FHF_INT   (1 << 9)

Definition at line 200 of file dp83620_driver.h.

◆ MISR_FHF_INT_EN

#define MISR_FHF_INT_EN   (1 << 1)

Definition at line 208 of file dp83620_driver.h.

◆ MISR_LINK_INT

#define MISR_LINK_INT   (1 << 13)

Definition at line 196 of file dp83620_driver.h.

◆ MISR_LINK_INT_EN

#define MISR_LINK_INT_EN   (1 << 5)

Definition at line 204 of file dp83620_driver.h.

◆ MISR_LQ_INT_EN

#define MISR_LQ_INT_EN   (1 << 7)

Definition at line 202 of file dp83620_driver.h.

◆ MISR_RHF_INT

#define MISR_RHF_INT   (1 << 8)

Definition at line 201 of file dp83620_driver.h.

◆ MISR_RHF_INT_EN

#define MISR_RHF_INT_EN   (1 << 0)

Definition at line 209 of file dp83620_driver.h.

◆ MISR_SPD_INT

#define MISR_SPD_INT   (1 << 12)

Definition at line 197 of file dp83620_driver.h.

◆ MISR_SPD_INT_EN

#define MISR_SPD_INT_EN   (1 << 4)

Definition at line 205 of file dp83620_driver.h.

◆ PAGESEL_PAGE_SEL0

#define PAGESEL_PAGE_SEL0   (1 << 0)

Definition at line 214 of file dp83620_driver.h.

◆ PAGESEL_PAGE_SEL1

#define PAGESEL_PAGE_SEL1   (1 << 1)

Definition at line 213 of file dp83620_driver.h.

◆ PAGESEL_PAGE_SEL2

#define PAGESEL_PAGE_SEL2   (1 << 2)

Definition at line 212 of file dp83620_driver.h.

◆ PCFCR_PCF_BC_DIS

#define PCFCR_PCF_BC_DIS   (1 << 5)

Definition at line 363 of file dp83620_driver.h.

◆ PCFCR_PCF_BUF0

#define PCFCR_PCF_BUF0   (1 << 1)

Definition at line 367 of file dp83620_driver.h.

◆ PCFCR_PCF_BUF1

#define PCFCR_PCF_BUF1   (1 << 2)

Definition at line 366 of file dp83620_driver.h.

◆ PCFCR_PCF_BUF2

#define PCFCR_PCF_BUF2   (1 << 3)

Definition at line 365 of file dp83620_driver.h.

◆ PCFCR_PCF_BUF3

#define PCFCR_PCF_BUF3   (1 << 4)

Definition at line 364 of file dp83620_driver.h.

◆ PCFCR_PCF_DA_SEL

#define PCFCR_PCF_DA_SEL   (1 << 8)

Definition at line 360 of file dp83620_driver.h.

◆ PCFCR_PCF_EN

#define PCFCR_PCF_EN   (1 << 0)

Definition at line 368 of file dp83620_driver.h.

◆ PCFCR_PCF_INT_CTL0

#define PCFCR_PCF_INT_CTL0   (1 << 6)

Definition at line 362 of file dp83620_driver.h.

◆ PCFCR_PCF_INT_CTL1

#define PCFCR_PCF_INT_CTL1   (1 << 7)

Definition at line 361 of file dp83620_driver.h.

◆ PCFCR_PCF_STS_ERR

#define PCFCR_PCF_STS_ERR   (1 << 15)

Definition at line 358 of file dp83620_driver.h.

◆ PCFCR_PCF_STS_OK

#define PCFCR_PCF_STS_OK   (1 << 14)

Definition at line 359 of file dp83620_driver.h.

◆ PCSR_AUTO_CROSSOVER

#define PCSR_AUTO_CROSSOVER   (1 << 15)

Definition at line 237 of file dp83620_driver.h.

◆ PCSR_DESC_TIME

#define PCSR_DESC_TIME   (1 << 7)

Definition at line 242 of file dp83620_driver.h.

◆ PCSR_DESCRAM_BYPASS

#define PCSR_DESCRAM_BYPASS   (1 << 0)

Definition at line 248 of file dp83620_driver.h.

◆ PCSR_FEFI_EN

#define PCSR_FEFI_EN   (1 << 3)

Definition at line 245 of file dp83620_driver.h.

◆ PCSR_FORCE_100_OK

#define PCSR_FORCE_100_OK   (1 << 5)

Definition at line 244 of file dp83620_driver.h.

◆ PCSR_FREE_CLK

#define PCSR_FREE_CLK   (1 << 11)

Definition at line 238 of file dp83620_driver.h.

◆ PCSR_FX_EN

#define PCSR_FX_EN   (1 << 6)

Definition at line 243 of file dp83620_driver.h.

◆ PCSR_NRZI_BYPASS

#define PCSR_NRZI_BYPASS   (1 << 2)

Definition at line 246 of file dp83620_driver.h.

◆ PCSR_SCRAM_BYPASS

#define PCSR_SCRAM_BYPASS   (1 << 1)

Definition at line 247 of file dp83620_driver.h.

◆ PCSR_SD_FORCE_PMA

#define PCSR_SD_FORCE_PMA   (1 << 9)

Definition at line 240 of file dp83620_driver.h.

◆ PCSR_SD_OPTION

#define PCSR_SD_OPTION   (1 << 8)

Definition at line 241 of file dp83620_driver.h.

◆ PCSR_TQ_EN

#define PCSR_TQ_EN   (1 << 10)

Definition at line 239 of file dp83620_driver.h.

◆ PHYCR2_BC_WRITE

#define PHYCR2_BC_WRITE   (1 << 11)

Definition at line 334 of file dp83620_driver.h.

◆ PHYCR2_CLK_OUT

#define PHYCR2_CLK_OUT   RXCLK (1 << 12)

Definition at line 333 of file dp83620_driver.h.

◆ PHYCR2_CLK_OUT_DIS

#define PHYCR2_CLK_OUT_DIS   (1 << 1)

Definition at line 337 of file dp83620_driver.h.

◆ PHYCR2_PHYTER_COMP

#define PHYCR2_PHYTER_COMP   (1 << 10)

Definition at line 335 of file dp83620_driver.h.

◆ PHYCR2_SOFT_RESET

#define PHYCR2_SOFT_RESET   (1 << 9)

Definition at line 336 of file dp83620_driver.h.

◆ PHYCR2_SYNC_ENET_EN

#define PHYCR2_SYNC_ENET_EN   (1 << 13)

Definition at line 332 of file dp83620_driver.h.

◆ PHYCR_BIST_FE

#define PHYCR_BIST_FE   (1 << 11)

Definition at line 287 of file dp83620_driver.h.

◆ PHYCR_BIST_START

#define PHYCR_BIST_START   (1 << 8)

Definition at line 290 of file dp83620_driver.h.

◆ PHYCR_BIST_STATUS

#define PHYCR_BIST_STATUS   (1 << 9)

Definition at line 289 of file dp83620_driver.h.

◆ PHYCR_BP_STRETCH

#define PHYCR_BP_STRETCH   (1 << 7)

Definition at line 291 of file dp83620_driver.h.

◆ PHYCR_FORCE_MDIX

#define PHYCR_FORCE_MDIX   (1 << 14)

Definition at line 284 of file dp83620_driver.h.

◆ PHYCR_LED_CNFG0

#define PHYCR_LED_CNFG0   (1 << 5)

Definition at line 293 of file dp83620_driver.h.

◆ PHYCR_LED_CNFG1

#define PHYCR_LED_CNFG1   (1 << 6)

Definition at line 292 of file dp83620_driver.h.

◆ PHYCR_MDIX_EN

#define PHYCR_MDIX_EN   (1 << 15)

Definition at line 283 of file dp83620_driver.h.

◆ PHYCR_PAUSE_RX

#define PHYCR_PAUSE_RX   (1 << 13)

Definition at line 285 of file dp83620_driver.h.

◆ PHYCR_PAUSE_TX

#define PHYCR_PAUSE_TX   (1 << 12)

Definition at line 286 of file dp83620_driver.h.

◆ PHYCR_PHYADDR0

#define PHYCR_PHYADDR0   (1 << 0)

Definition at line 298 of file dp83620_driver.h.

◆ PHYCR_PHYADDR1

#define PHYCR_PHYADDR1   (1 << 1)

Definition at line 297 of file dp83620_driver.h.

◆ PHYCR_PHYADDR2

#define PHYCR_PHYADDR2   (1 << 2)

Definition at line 296 of file dp83620_driver.h.

◆ PHYCR_PHYADDR3

#define PHYCR_PHYADDR3   (1 << 3)

Definition at line 295 of file dp83620_driver.h.

◆ PHYCR_PHYADDR4

#define PHYCR_PHYADDR4   (1 << 4)

Definition at line 294 of file dp83620_driver.h.

◆ PHYCR_PSR_15

#define PHYCR_PSR_15   (1 << 10)

Definition at line 288 of file dp83620_driver.h.

◆ PHYSTS_AN_COMPLETE

#define PHYSTS_AN_COMPLETE   (1 << 4)

Definition at line 183 of file dp83620_driver.h.

◆ PHYSTS_DESCRAMBLER_LOCK

#define PHYSTS_DESCRAMBLER_LOCK   (1 << 9)

Definition at line 178 of file dp83620_driver.h.

◆ PHYSTS_DUPLEX_STATUS

#define PHYSTS_DUPLEX_STATUS   (1 << 2)

Definition at line 185 of file dp83620_driver.h.

◆ PHYSTS_FALSE_CARRIER_SENSE

#define PHYSTS_FALSE_CARRIER_SENSE   (1 << 11)

Definition at line 176 of file dp83620_driver.h.

◆ PHYSTS_JABBER_DETECT

#define PHYSTS_JABBER_DETECT   (1 << 5)

Definition at line 182 of file dp83620_driver.h.

◆ PHYSTS_LINK_STATUS

#define PHYSTS_LINK_STATUS   (1 << 0)

Definition at line 187 of file dp83620_driver.h.

◆ PHYSTS_LOOPBACK_STATUS

#define PHYSTS_LOOPBACK_STATUS   (1 << 3)

Definition at line 184 of file dp83620_driver.h.

◆ PHYSTS_MDIX_MODE

#define PHYSTS_MDIX_MODE   (1 << 14)

Definition at line 173 of file dp83620_driver.h.

◆ PHYSTS_MII_INTERRUPT

#define PHYSTS_MII_INTERRUPT   (1 << 7)

Definition at line 180 of file dp83620_driver.h.

◆ PHYSTS_PAGE_RECEIVED

#define PHYSTS_PAGE_RECEIVED   (1 << 8)

Definition at line 179 of file dp83620_driver.h.

◆ PHYSTS_POLARITY_STATUS

#define PHYSTS_POLARITY_STATUS   (1 << 12)

Definition at line 175 of file dp83620_driver.h.

◆ PHYSTS_REMOTE_FAULT

#define PHYSTS_REMOTE_FAULT   (1 << 6)

Definition at line 181 of file dp83620_driver.h.

◆ PHYSTS_RX_ERROR_LATCH

#define PHYSTS_RX_ERROR_LATCH   (1 << 13)

Definition at line 174 of file dp83620_driver.h.

◆ PHYSTS_SIGNAL_DETECT

#define PHYSTS_SIGNAL_DETECT   (1 << 10)

Definition at line 177 of file dp83620_driver.h.

◆ PHYSTS_SPEED_STATUS

#define PHYSTS_SPEED_STATUS   (1 << 1)

Definition at line 186 of file dp83620_driver.h.

◆ PSF_CFG_MAC_SRC_ADD0

#define PSF_CFG_MAC_SRC_ADD0   (1 << 11)

Definition at line 504 of file dp83620_driver.h.

◆ PSF_CFG_MAC_SRC_ADD1

#define PSF_CFG_MAC_SRC_ADD1   (1 << 12)

Definition at line 503 of file dp83620_driver.h.

◆ PSF_CFG_MIN_PRE0

#define PSF_CFG_MIN_PRE0   (1 << 8)

Definition at line 507 of file dp83620_driver.h.

◆ PSF_CFG_MIN_PRE1

#define PSF_CFG_MIN_PRE1   (1 << 9)

Definition at line 506 of file dp83620_driver.h.

◆ PSF_CFG_MIN_PRE2

#define PSF_CFG_MIN_PRE2   (1 << 10)

Definition at line 505 of file dp83620_driver.h.

◆ PSF_CFG_PSF_ENDIAN

#define PSF_CFG_PSF_ENDIAN   (1 << 7)

Definition at line 508 of file dp83620_driver.h.

◆ PSF_CFG_PSF_ERR_EN

#define PSF_CFG_PSF_ERR_EN   (1 << 4)

Definition at line 511 of file dp83620_driver.h.

◆ PSF_CFG_PSF_IPV4

#define PSF_CFG_PSF_IPV4   (1 << 6)

Definition at line 509 of file dp83620_driver.h.

◆ PSF_CFG_PSF_PCF_RD

#define PSF_CFG_PSF_PCF_RD   (1 << 5)

Definition at line 510 of file dp83620_driver.h.

◆ RBR_DIS_TX_OPT

#define RBR_DIS_TX_OPT   (1 << 13)

Definition at line 252 of file dp83620_driver.h.

◆ RBR_ELAST_BUF0

#define RBR_ELAST_BUF0   (1 << 0)

Definition at line 261 of file dp83620_driver.h.

◆ RBR_ELAST_BUF1

#define RBR_ELAST_BUF1   (1 << 1)

Definition at line 260 of file dp83620_driver.h.

◆ RBR_PMD_LOOP

#define RBR_PMD_LOOP   (1 << 8)

Definition at line 253 of file dp83620_driver.h.

◆ RBR_RMII_MASTER

#define RBR_RMII_MASTER   (1 << 14)

Definition at line 251 of file dp83620_driver.h.

◆ RBR_RMII_MODE

#define RBR_RMII_MODE   (1 << 5)

Definition at line 256 of file dp83620_driver.h.

◆ RBR_RMII_REV1_0

#define RBR_RMII_REV1_0   (1 << 4)

Definition at line 257 of file dp83620_driver.h.

◆ RBR_RX_OVF_STS

#define RBR_RX_OVF_STS   (1 << 3)

Definition at line 258 of file dp83620_driver.h.

◆ RBR_RX_UNF_STS

#define RBR_RX_UNF_STS   (1 << 2)

Definition at line 259 of file dp83620_driver.h.

◆ RBR_SCMII_RX

#define RBR_SCMII_RX   (1 << 7)

Definition at line 254 of file dp83620_driver.h.

◆ RBR_SCMII_TX

#define RBR_SCMII_TX   (1 << 6)

Definition at line 255 of file dp83620_driver.h.

◆ RECR_RXERCNT0

#define RECR_RXERCNT0   (1 << 0)

Definition at line 234 of file dp83620_driver.h.

◆ RECR_RXERCNT1

#define RECR_RXERCNT1   (1 << 1)

Definition at line 233 of file dp83620_driver.h.

◆ RECR_RXERCNT2

#define RECR_RXERCNT2   (1 << 2)

Definition at line 232 of file dp83620_driver.h.

◆ RECR_RXERCNT3

#define RECR_RXERCNT3   (1 << 3)

Definition at line 231 of file dp83620_driver.h.

◆ RECR_RXERCNT4

#define RECR_RXERCNT4   (1 << 4)

Definition at line 230 of file dp83620_driver.h.

◆ RECR_RXERCNT5

#define RECR_RXERCNT5   (1 << 5)

Definition at line 229 of file dp83620_driver.h.

◆ RECR_RXERCNT6

#define RECR_RXERCNT6   (1 << 6)

Definition at line 228 of file dp83620_driver.h.

◆ RECR_RXERCNT7

#define RECR_RXERCNT7   (1 << 7)

Definition at line 227 of file dp83620_driver.h.

◆ SD_CNFG_SD_TIME

#define SD_CNFG_SD_TIME   (1 << 8)

Definition at line 371 of file dp83620_driver.h.

◆ TDR_CTRL_RX_CHANNEL

#define TDR_CTRL_RX_CHANNEL   (1 << 12)

Definition at line 399 of file dp83620_driver.h.

◆ TDR_CTRL_RX_THRESHOLD0

#define TDR_CTRL_RX_THRESHOLD0   (1 << 0)

Definition at line 410 of file dp83620_driver.h.

◆ TDR_CTRL_RX_THRESHOLD1

#define TDR_CTRL_RX_THRESHOLD1   (1 << 1)

Definition at line 409 of file dp83620_driver.h.

◆ TDR_CTRL_RX_THRESHOLD2

#define TDR_CTRL_RX_THRESHOLD2   (1 << 2)

Definition at line 408 of file dp83620_driver.h.

◆ TDR_CTRL_RX_THRESHOLD3

#define TDR_CTRL_RX_THRESHOLD3   (1 << 3)

Definition at line 407 of file dp83620_driver.h.

◆ TDR_CTRL_RX_THRESHOLD4

#define TDR_CTRL_RX_THRESHOLD4   (1 << 4)

Definition at line 406 of file dp83620_driver.h.

◆ TDR_CTRL_RX_THRESHOLD5

#define TDR_CTRL_RX_THRESHOLD5   (1 << 5)

Definition at line 405 of file dp83620_driver.h.

◆ TDR_CTRL_SEND_TDR

#define TDR_CTRL_SEND_TDR   (1 << 11)

Definition at line 400 of file dp83620_driver.h.

◆ TDR_CTRL_TDR_100MB

#define TDR_CTRL_TDR_100MB   (1 << 14)

Definition at line 397 of file dp83620_driver.h.

◆ TDR_CTRL_TDR_ENABLE

#define TDR_CTRL_TDR_ENABLE   (1 << 15)

Definition at line 396 of file dp83620_driver.h.

◆ TDR_CTRL_TDR_MIN_MODE

#define TDR_CTRL_TDR_MIN_MODE   (1 << 7)

Definition at line 404 of file dp83620_driver.h.

◆ TDR_CTRL_TDR_WIDTH0

#define TDR_CTRL_TDR_WIDTH0   (1 << 8)

Definition at line 403 of file dp83620_driver.h.

◆ TDR_CTRL_TDR_WIDTH1

#define TDR_CTRL_TDR_WIDTH1   (1 << 9)

Definition at line 402 of file dp83620_driver.h.

◆ TDR_CTRL_TDR_WIDTH2

#define TDR_CTRL_TDR_WIDTH2   (1 << 10)

Definition at line 401 of file dp83620_driver.h.

◆ TDR_CTRL_TX_CHANNEL

#define TDR_CTRL_TX_CHANNEL   (1 << 13)

Definition at line 398 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK0

#define TDR_PEAK_TDR_PEAK0   (1 << 8)

Definition at line 436 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK1

#define TDR_PEAK_TDR_PEAK1   (1 << 9)

Definition at line 435 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK2

#define TDR_PEAK_TDR_PEAK2   (1 << 10)

Definition at line 434 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK3

#define TDR_PEAK_TDR_PEAK3   (1 << 11)

Definition at line 433 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK4

#define TDR_PEAK_TDR_PEAK4   (1 << 12)

Definition at line 432 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK5

#define TDR_PEAK_TDR_PEAK5   (1 << 13)

Definition at line 431 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK_TIME0

#define TDR_PEAK_TDR_PEAK_TIME0   (1 << 0)

Definition at line 444 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK_TIME1

#define TDR_PEAK_TDR_PEAK_TIME1   (1 << 1)

Definition at line 443 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK_TIME2

#define TDR_PEAK_TDR_PEAK_TIME2   (1 << 2)

Definition at line 442 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK_TIME3

#define TDR_PEAK_TDR_PEAK_TIME3   (1 << 3)

Definition at line 441 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK_TIME4

#define TDR_PEAK_TDR_PEAK_TIME4   (1 << 4)

Definition at line 440 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK_TIME5

#define TDR_PEAK_TDR_PEAK_TIME5   (1 << 5)

Definition at line 439 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK_TIME6

#define TDR_PEAK_TDR_PEAK_TIME6   (1 << 6)

Definition at line 438 of file dp83620_driver.h.

◆ TDR_PEAK_TDR_PEAK_TIME7

#define TDR_PEAK_TDR_PEAK_TIME7   (1 << 7)

Definition at line 437 of file dp83620_driver.h.

◆ TDR_THR_TDR_THR_MET

#define TDR_THR_TDR_THR_MET   (1 << 8)

Definition at line 447 of file dp83620_driver.h.

◆ TDR_THR_TDR_THR_TIME0

#define TDR_THR_TDR_THR_TIME0   (1 << 0)

Definition at line 455 of file dp83620_driver.h.

◆ TDR_THR_TDR_THR_TIME1

#define TDR_THR_TDR_THR_TIME1   (1 << 1)

Definition at line 454 of file dp83620_driver.h.

◆ TDR_THR_TDR_THR_TIME2

#define TDR_THR_TDR_THR_TIME2   (1 << 2)

Definition at line 453 of file dp83620_driver.h.

◆ TDR_THR_TDR_THR_TIME3

#define TDR_THR_TDR_THR_TIME3   (1 << 3)

Definition at line 452 of file dp83620_driver.h.

◆ TDR_THR_TDR_THR_TIME4

#define TDR_THR_TDR_THR_TIME4   (1 << 4)

Definition at line 451 of file dp83620_driver.h.

◆ TDR_THR_TDR_THR_TIME5

#define TDR_THR_TDR_THR_TIME5   (1 << 5)

Definition at line 450 of file dp83620_driver.h.

◆ TDR_THR_TDR_THR_TIME6

#define TDR_THR_TDR_THR_TIME6   (1 << 6)

Definition at line 449 of file dp83620_driver.h.

◆ TDR_THR_TDR_THR_TIME7

#define TDR_THR_TDR_THR_TIME7   (1 << 7)

Definition at line 448 of file dp83620_driver.h.

◆ TDR_WIN_TDR_START0

#define TDR_WIN_TDR_START0   (1 << 8)

Definition at line 420 of file dp83620_driver.h.

◆ TDR_WIN_TDR_START1

#define TDR_WIN_TDR_START1   (1 << 9)

Definition at line 419 of file dp83620_driver.h.

◆ TDR_WIN_TDR_START2

#define TDR_WIN_TDR_START2   (1 << 10)

Definition at line 418 of file dp83620_driver.h.

◆ TDR_WIN_TDR_START3

#define TDR_WIN_TDR_START3   (1 << 11)

Definition at line 417 of file dp83620_driver.h.

◆ TDR_WIN_TDR_START4

#define TDR_WIN_TDR_START4   (1 << 12)

Definition at line 416 of file dp83620_driver.h.

◆ TDR_WIN_TDR_START5

#define TDR_WIN_TDR_START5   (1 << 13)

Definition at line 415 of file dp83620_driver.h.

◆ TDR_WIN_TDR_START6

#define TDR_WIN_TDR_START6   (1 << 14)

Definition at line 414 of file dp83620_driver.h.

◆ TDR_WIN_TDR_START7

#define TDR_WIN_TDR_START7   (1 << 15)

Definition at line 413 of file dp83620_driver.h.

◆ TDR_WIN_TDR_STOP0

#define TDR_WIN_TDR_STOP0   (1 << 0)

Definition at line 428 of file dp83620_driver.h.

◆ TDR_WIN_TDR_STOP1

#define TDR_WIN_TDR_STOP1   (1 << 1)

Definition at line 427 of file dp83620_driver.h.

◆ TDR_WIN_TDR_STOP2

#define TDR_WIN_TDR_STOP2   (1 << 2)

Definition at line 426 of file dp83620_driver.h.

◆ TDR_WIN_TDR_STOP3

#define TDR_WIN_TDR_STOP3   (1 << 3)

Definition at line 425 of file dp83620_driver.h.

◆ TDR_WIN_TDR_STOP4

#define TDR_WIN_TDR_STOP4   (1 << 4)

Definition at line 424 of file dp83620_driver.h.

◆ TDR_WIN_TDR_STOP5

#define TDR_WIN_TDR_STOP5   (1 << 5)

Definition at line 423 of file dp83620_driver.h.

◆ TDR_WIN_TDR_STOP6

#define TDR_WIN_TDR_STOP6   (1 << 6)

Definition at line 422 of file dp83620_driver.h.

◆ TDR_WIN_TDR_STOP7

#define TDR_WIN_TDR_STOP7   (1 << 7)

Definition at line 421 of file dp83620_driver.h.

◆ VAR_CTRL_VAR_ENABLE

#define VAR_CTRL_VAR_ENABLE   (1 << 0)

Definition at line 462 of file dp83620_driver.h.

◆ VAR_CTRL_VAR_FREEZE

#define VAR_CTRL_VAR_FREEZE   (1 << 3)

Definition at line 459 of file dp83620_driver.h.

◆ VAR_CTRL_VAR_RDY

#define VAR_CTRL_VAR_RDY   (1 << 15)

Definition at line 458 of file dp83620_driver.h.

◆ VAR_CTRL_VAR_TIMER0

#define VAR_CTRL_VAR_TIMER0   (1 << 1)

Definition at line 461 of file dp83620_driver.h.

◆ VAR_CTRL_VAR_TIMER1

#define VAR_CTRL_VAR_TIMER1   (1 << 2)

Definition at line 460 of file dp83620_driver.h.

Function Documentation

◆ dp83620DisableIrq()

void dp83620DisableIrq ( NetInterface interface)

Disable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 146 of file dp83620_driver.c.

◆ dp83620DumpPhyReg()

void dp83620DumpPhyReg ( NetInterface interface)

Dump PHY registers for debugging purpose.

Parameters
[in]interfaceUnderlying network interface

Definition at line 254 of file dp83620_driver.c.

◆ dp83620EnableIrq()

void dp83620EnableIrq ( NetInterface interface)

Enable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 133 of file dp83620_driver.c.

◆ dp83620EventHandler()

void dp83620EventHandler ( NetInterface interface)

DP83620 event handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 159 of file dp83620_driver.c.

◆ dp83620Init()

error_t dp83620Init ( NetInterface interface)

DP83620 PHY transceiver initialization.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 58 of file dp83620_driver.c.

◆ dp83620ReadPhyReg()

uint16_t dp83620ReadPhyReg ( NetInterface interface,
uint8_t  address 
)

Read PHY register.

Parameters
[in]interfaceUnderlying network interface
[in]addressPHY register address
Returns
Register value

Definition at line 234 of file dp83620_driver.c.

◆ dp83620Tick()

void dp83620Tick ( NetInterface interface)

DP83620 timer handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 95 of file dp83620_driver.c.

◆ dp83620WritePhyReg()

void dp83620WritePhyReg ( NetInterface interface,
uint8_t  address,
uint16_t  data 
)

Write PHY register.

Parameters
[in]interfaceUnderlying network interface
[in]addressPHY register address
[in]dataRegister value

Definition at line 212 of file dp83620_driver.c.

Variable Documentation

◆ dp83620PhyDriver

const PhyDriver dp83620PhyDriver

DP83620 Ethernet PHY driver.

Definition at line 42 of file dp83620_driver.c.