pic32mx_eth_driver.h File Reference

PIC32MX Ethernet MAC controller. More...

#include "core/nic.h"

Go to the source code of this file.

Data Structures

struct  Pic32mxTxBufferDesc
 TX buffer descriptor. More...
 
struct  Pic32mxRxBufferDesc
 RX buffer descriptor. More...
 

Macros

#define PIC32MX_ETH_TX_BUFFER_COUNT   2
 
#define PIC32MX_ETH_TX_BUFFER_SIZE   1536
 
#define PIC32MX_ETH_RX_BUFFER_COUNT   4
 
#define PIC32MX_ETH_RX_BUFFER_SIZE   1536
 
#define PIC32MX_ETH_IRQ_PRIORITY   2
 
#define PIC32MX_ETH_IRQ_SUB_PRIORITY   0
 
#define _EMAC1MCFG_CLKSEL_DIV4   (0 << _EMAC1MCFG_CLKSEL_POSITION)
 
#define _EMAC1MCFG_CLKSEL_DIV6   (2 << _EMAC1MCFG_CLKSEL_POSITION)
 
#define _EMAC1MCFG_CLKSEL_DIV8   (3 << _EMAC1MCFG_CLKSEL_POSITION)
 
#define _EMAC1MCFG_CLKSEL_DIV10   (4 << _EMAC1MCFG_CLKSEL_POSITION)
 
#define _EMAC1MCFG_CLKSEL_DIV14   (5 << _EMAC1MCFG_CLKSEL_POSITION)
 
#define _EMAC1MCFG_CLKSEL_DIV20   (6 << _EMAC1MCFG_CLKSEL_POSITION)
 
#define _EMAC1MCFG_CLKSEL_DIV28   (7 << _EMAC1MCFG_CLKSEL_POSITION)
 
#define _EMAC1MCFG_CLKSEL_DIV40   (8 << _EMAC1MCFG_CLKSEL_POSITION)
 
#define ETH_TX_CTRL_SOP   0x80000000
 
#define ETH_TX_CTRL_EOP   0x40000000
 
#define ETH_TX_CTRL_BYTE_COUNT   0x07FF0000
 
#define ETH_TX_CTRL_NPV   0x00000100
 
#define ETH_TX_CTRL_EOWN   0x00000080
 
#define ETH_TX_STATUS1_VLAN   0x00080000
 
#define ETH_TX_STATUS1_BACKPRESSURE   0x00040000
 
#define ETH_TX_STATUS1_PAUSE   0x00020000
 
#define ETH_TX_STATUS1_CONTROL   0x00010000
 
#define ETH_TX_STATUS1_TOTAL_BYTES   0x0000FFFF
 
#define ETH_TX_STATUS2_UNDERRUN   0x80000000
 
#define ETH_TX_STATUS2_GIANT   0x40000000
 
#define ETH_TX_STATUS2_LATE_COL   0x20000000
 
#define ETH_TX_STATUS2_MAX_COL   0x10000000
 
#define ETH_TX_STATUS2_EXCESSIVE_DEFER   0x08000000
 
#define ETH_TX_STATUS2_PACKET_DEFER   0x04000000
 
#define ETH_TX_STATUS2_BROADCAST   0x02000000
 
#define ETH_TX_STATUS2_MULTICAST   0x01000000
 
#define ETH_TX_STATUS2_DONE   0x00800000
 
#define ETH_TX_STATUS2_LEN_OUT_OF_RANGE   0x00400000
 
#define ETH_TX_STATUS2_LEN_CHECK_ERROR   0x00200000
 
#define ETH_TX_STATUS2_CRC_ERROR   0x00100000
 
#define ETH_TX_STATUS2_COL_COUNT   0x000F0000
 
#define ETH_TX_STATUS2_BYTE_COUNT   0x0000FFFF
 
#define ETH_RX_CTRL_SOP   0x80000000
 
#define ETH_RX_CTRL_EOP   0x40000000
 
#define ETH_RX_CTRL_BYTE_COUNT   0x07FF0000
 
#define ETH_RX_CTRL_NPV   0x00000100
 
#define ETH_RX_CTRL_EOWN   0x00000080
 
#define ETH_RX_STATUS1_MULTICAST_MATCH   0x80000000
 
#define ETH_RX_STATUS1_BROADCAST_MATCH   0x40000000
 
#define ETH_RX_STATUS1_UNICAST_MATCH   0x20000000
 
#define ETH_RX_STATUS1_PATTERN_MATCH   0x10000000
 
#define ETH_RX_STATUS1_MAGIC_PACKET_MATCH   0x08000000
 
#define ETH_RX_STATUS1_HASH_TABLE_MATCH   0x04000000
 
#define ETH_RX_STATUS1_NOT_MATCH   0x02000000
 
#define ETH_RX_STATUS1_RUNT_PACKET   0x01000000
 
#define ETH_RX_STATUS1_PACKET_CHECKSUM   0x0000FFFF
 
#define ETH_RX_STATUS2_VLAN   0x40000000
 
#define ETH_RX_STATUS2_UNKNOWN_OP_CODE   0x20000000
 
#define ETH_RX_STATUS2_PAUSE   0x10000000
 
#define ETH_RX_STATUS2_CONTROL   0x08000000
 
#define ETH_RX_STATUS2_DRIBBLE_NIBBLE   0x04000000
 
#define ETH_RX_STATUS2_BROADCAST   0x02000000
 
#define ETH_RX_STATUS2_MULTICAST   0x01000000
 
#define ETH_RX_STATUS2_OK   0x00800000
 
#define ETH_RX_STATUS2_LEN_OUT_OF_RANGE   0x00400000
 
#define ETH_RX_STATUS2_LEN_CHECK_ERROR   0x00200000
 
#define ETH_RX_STATUS2_CRC_ERROR   0x00100000
 
#define ETH_RX_STATUS2_CODE_VIOLATION   0x00080000
 
#define ETH_RX_STATUS2_CARRIER_EVENT   0x00040000
 
#define ETH_RX_STATUS2_RXDV_EVENT   0x00020000
 
#define ETH_RX_STATUS2_LONG_EVENT   0x00010000
 
#define ETH_RX_STATUS2_BYTE_COUNT   0x0000FFFF
 

Functions

error_t pic32mxEthInit (NetInterface *interface)
 PIC32MX Ethernet MAC initialization. More...
 
void pic32mxEthInitGpio (NetInterface *interface)
 
void pic32mxEthInitBufferDesc (NetInterface *interface)
 Initialize DMA descriptor lists. More...
 
void pic32mxEthTick (NetInterface *interface)
 PIC32MX Ethernet MAC timer handler. More...
 
void pic32mxEthEnableIrq (NetInterface *interface)
 Enable interrupts. More...
 
void pic32mxEthDisableIrq (NetInterface *interface)
 Disable interrupts. More...
 
void pic32mxEthIrqHandler (void)
 PIC32MX Ethernet MAC interrupt service routine. More...
 
void pic32mxEthEventHandler (NetInterface *interface)
 PIC32MX Ethernet MAC event handler. More...
 
error_t pic32mxEthSendPacket (NetInterface *interface, const NetBuffer *buffer, size_t offset)
 Send a packet. More...
 
error_t pic32mxEthReceivePacket (NetInterface *interface)
 Receive a packet. More...
 
error_t pic32mxEthUpdateMacAddrFilter (NetInterface *interface)
 Configure MAC address filtering. More...
 
error_t pic32mxEthUpdateMacConfig (NetInterface *interface)
 Adjust MAC configuration parameters for proper operation. More...
 
void pic32mxEthWritePhyReg (uint8_t phyAddr, uint8_t regAddr, uint16_t data)
 Write PHY register. More...
 
uint16_t pic32mxEthReadPhyReg (uint8_t phyAddr, uint8_t regAddr)
 Read PHY register. More...
 
uint32_t pic32mxEthCalcCrc (const void *data, size_t length)
 CRC calculation. More...
 

Variables

const NicDriver pic32mxEthDriver
 PIC32MX Ethernet MAC driver. More...
 

Detailed Description

PIC32MX Ethernet MAC controller.

License

Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author
Oryx Embedded SARL (www.oryx-embedded.com)
Version
1.9.0

Definition in file pic32mx_eth_driver.h.

Macro Definition Documentation

◆ _EMAC1MCFG_CLKSEL_DIV10

#define _EMAC1MCFG_CLKSEL_DIV10   (4 << _EMAC1MCFG_CLKSEL_POSITION)

Definition at line 81 of file pic32mx_eth_driver.h.

◆ _EMAC1MCFG_CLKSEL_DIV14

#define _EMAC1MCFG_CLKSEL_DIV14   (5 << _EMAC1MCFG_CLKSEL_POSITION)

Definition at line 82 of file pic32mx_eth_driver.h.

◆ _EMAC1MCFG_CLKSEL_DIV20

#define _EMAC1MCFG_CLKSEL_DIV20   (6 << _EMAC1MCFG_CLKSEL_POSITION)

Definition at line 83 of file pic32mx_eth_driver.h.

◆ _EMAC1MCFG_CLKSEL_DIV28

#define _EMAC1MCFG_CLKSEL_DIV28   (7 << _EMAC1MCFG_CLKSEL_POSITION)

Definition at line 84 of file pic32mx_eth_driver.h.

◆ _EMAC1MCFG_CLKSEL_DIV4

#define _EMAC1MCFG_CLKSEL_DIV4   (0 << _EMAC1MCFG_CLKSEL_POSITION)

Definition at line 78 of file pic32mx_eth_driver.h.

◆ _EMAC1MCFG_CLKSEL_DIV40

#define _EMAC1MCFG_CLKSEL_DIV40   (8 << _EMAC1MCFG_CLKSEL_POSITION)

Definition at line 85 of file pic32mx_eth_driver.h.

◆ _EMAC1MCFG_CLKSEL_DIV6

#define _EMAC1MCFG_CLKSEL_DIV6   (2 << _EMAC1MCFG_CLKSEL_POSITION)

Definition at line 79 of file pic32mx_eth_driver.h.

◆ _EMAC1MCFG_CLKSEL_DIV8

#define _EMAC1MCFG_CLKSEL_DIV8   (3 << _EMAC1MCFG_CLKSEL_POSITION)

Definition at line 80 of file pic32mx_eth_driver.h.

◆ ETH_RX_CTRL_BYTE_COUNT

#define ETH_RX_CTRL_BYTE_COUNT   0x07FF0000

Definition at line 116 of file pic32mx_eth_driver.h.

◆ ETH_RX_CTRL_EOP

#define ETH_RX_CTRL_EOP   0x40000000

Definition at line 115 of file pic32mx_eth_driver.h.

◆ ETH_RX_CTRL_EOWN

#define ETH_RX_CTRL_EOWN   0x00000080

Definition at line 118 of file pic32mx_eth_driver.h.

◆ ETH_RX_CTRL_NPV

#define ETH_RX_CTRL_NPV   0x00000100

Definition at line 117 of file pic32mx_eth_driver.h.

◆ ETH_RX_CTRL_SOP

#define ETH_RX_CTRL_SOP   0x80000000

Definition at line 114 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS1_BROADCAST_MATCH

#define ETH_RX_STATUS1_BROADCAST_MATCH   0x40000000

Definition at line 120 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS1_HASH_TABLE_MATCH

#define ETH_RX_STATUS1_HASH_TABLE_MATCH   0x04000000

Definition at line 124 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS1_MAGIC_PACKET_MATCH

#define ETH_RX_STATUS1_MAGIC_PACKET_MATCH   0x08000000

Definition at line 123 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS1_MULTICAST_MATCH

#define ETH_RX_STATUS1_MULTICAST_MATCH   0x80000000

Definition at line 119 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS1_NOT_MATCH

#define ETH_RX_STATUS1_NOT_MATCH   0x02000000

Definition at line 125 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS1_PACKET_CHECKSUM

#define ETH_RX_STATUS1_PACKET_CHECKSUM   0x0000FFFF

Definition at line 127 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS1_PATTERN_MATCH

#define ETH_RX_STATUS1_PATTERN_MATCH   0x10000000

Definition at line 122 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS1_RUNT_PACKET

#define ETH_RX_STATUS1_RUNT_PACKET   0x01000000

Definition at line 126 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS1_UNICAST_MATCH

#define ETH_RX_STATUS1_UNICAST_MATCH   0x20000000

Definition at line 121 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_BROADCAST

#define ETH_RX_STATUS2_BROADCAST   0x02000000

Definition at line 133 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_BYTE_COUNT

#define ETH_RX_STATUS2_BYTE_COUNT   0x0000FFFF

Definition at line 143 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_CARRIER_EVENT

#define ETH_RX_STATUS2_CARRIER_EVENT   0x00040000

Definition at line 140 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_CODE_VIOLATION

#define ETH_RX_STATUS2_CODE_VIOLATION   0x00080000

Definition at line 139 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_CONTROL

#define ETH_RX_STATUS2_CONTROL   0x08000000

Definition at line 131 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_CRC_ERROR

#define ETH_RX_STATUS2_CRC_ERROR   0x00100000

Definition at line 138 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_DRIBBLE_NIBBLE

#define ETH_RX_STATUS2_DRIBBLE_NIBBLE   0x04000000

Definition at line 132 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_LEN_CHECK_ERROR

#define ETH_RX_STATUS2_LEN_CHECK_ERROR   0x00200000

Definition at line 137 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_LEN_OUT_OF_RANGE

#define ETH_RX_STATUS2_LEN_OUT_OF_RANGE   0x00400000

Definition at line 136 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_LONG_EVENT

#define ETH_RX_STATUS2_LONG_EVENT   0x00010000

Definition at line 142 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_MULTICAST

#define ETH_RX_STATUS2_MULTICAST   0x01000000

Definition at line 134 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_OK

#define ETH_RX_STATUS2_OK   0x00800000

Definition at line 135 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_PAUSE

#define ETH_RX_STATUS2_PAUSE   0x10000000

Definition at line 130 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_RXDV_EVENT

#define ETH_RX_STATUS2_RXDV_EVENT   0x00020000

Definition at line 141 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_UNKNOWN_OP_CODE

#define ETH_RX_STATUS2_UNKNOWN_OP_CODE   0x20000000

Definition at line 129 of file pic32mx_eth_driver.h.

◆ ETH_RX_STATUS2_VLAN

#define ETH_RX_STATUS2_VLAN   0x40000000

Definition at line 128 of file pic32mx_eth_driver.h.

◆ ETH_TX_CTRL_BYTE_COUNT

#define ETH_TX_CTRL_BYTE_COUNT   0x07FF0000

Definition at line 90 of file pic32mx_eth_driver.h.

◆ ETH_TX_CTRL_EOP

#define ETH_TX_CTRL_EOP   0x40000000

Definition at line 89 of file pic32mx_eth_driver.h.

◆ ETH_TX_CTRL_EOWN

#define ETH_TX_CTRL_EOWN   0x00000080

Definition at line 92 of file pic32mx_eth_driver.h.

◆ ETH_TX_CTRL_NPV

#define ETH_TX_CTRL_NPV   0x00000100

Definition at line 91 of file pic32mx_eth_driver.h.

◆ ETH_TX_CTRL_SOP

#define ETH_TX_CTRL_SOP   0x80000000

Definition at line 88 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS1_BACKPRESSURE

#define ETH_TX_STATUS1_BACKPRESSURE   0x00040000

Definition at line 94 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS1_CONTROL

#define ETH_TX_STATUS1_CONTROL   0x00010000

Definition at line 96 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS1_PAUSE

#define ETH_TX_STATUS1_PAUSE   0x00020000

Definition at line 95 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS1_TOTAL_BYTES

#define ETH_TX_STATUS1_TOTAL_BYTES   0x0000FFFF

Definition at line 97 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS1_VLAN

#define ETH_TX_STATUS1_VLAN   0x00080000

Definition at line 93 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_BROADCAST

#define ETH_TX_STATUS2_BROADCAST   0x02000000

Definition at line 104 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_BYTE_COUNT

#define ETH_TX_STATUS2_BYTE_COUNT   0x0000FFFF

Definition at line 111 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_COL_COUNT

#define ETH_TX_STATUS2_COL_COUNT   0x000F0000

Definition at line 110 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_CRC_ERROR

#define ETH_TX_STATUS2_CRC_ERROR   0x00100000

Definition at line 109 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_DONE

#define ETH_TX_STATUS2_DONE   0x00800000

Definition at line 106 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_EXCESSIVE_DEFER

#define ETH_TX_STATUS2_EXCESSIVE_DEFER   0x08000000

Definition at line 102 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_GIANT

#define ETH_TX_STATUS2_GIANT   0x40000000

Definition at line 99 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_LATE_COL

#define ETH_TX_STATUS2_LATE_COL   0x20000000

Definition at line 100 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_LEN_CHECK_ERROR

#define ETH_TX_STATUS2_LEN_CHECK_ERROR   0x00200000

Definition at line 108 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_LEN_OUT_OF_RANGE

#define ETH_TX_STATUS2_LEN_OUT_OF_RANGE   0x00400000

Definition at line 107 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_MAX_COL

#define ETH_TX_STATUS2_MAX_COL   0x10000000

Definition at line 101 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_MULTICAST

#define ETH_TX_STATUS2_MULTICAST   0x01000000

Definition at line 105 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_PACKET_DEFER

#define ETH_TX_STATUS2_PACKET_DEFER   0x04000000

Definition at line 103 of file pic32mx_eth_driver.h.

◆ ETH_TX_STATUS2_UNDERRUN

#define ETH_TX_STATUS2_UNDERRUN   0x80000000

Definition at line 98 of file pic32mx_eth_driver.h.

◆ PIC32MX_ETH_IRQ_PRIORITY

#define PIC32MX_ETH_IRQ_PRIORITY   2

Definition at line 65 of file pic32mx_eth_driver.h.

◆ PIC32MX_ETH_IRQ_SUB_PRIORITY

#define PIC32MX_ETH_IRQ_SUB_PRIORITY   0

Definition at line 72 of file pic32mx_eth_driver.h.

◆ PIC32MX_ETH_RX_BUFFER_COUNT

#define PIC32MX_ETH_RX_BUFFER_COUNT   4

Definition at line 51 of file pic32mx_eth_driver.h.

◆ PIC32MX_ETH_RX_BUFFER_SIZE

#define PIC32MX_ETH_RX_BUFFER_SIZE   1536

Definition at line 58 of file pic32mx_eth_driver.h.

◆ PIC32MX_ETH_TX_BUFFER_COUNT

#define PIC32MX_ETH_TX_BUFFER_COUNT   2

Definition at line 37 of file pic32mx_eth_driver.h.

◆ PIC32MX_ETH_TX_BUFFER_SIZE

#define PIC32MX_ETH_TX_BUFFER_SIZE   1536

Definition at line 44 of file pic32mx_eth_driver.h.

Function Documentation

◆ pic32mxEthCalcCrc()

uint32_t pic32mxEthCalcCrc ( const void *  data,
size_t  length 
)

CRC calculation.

Parameters
[in]dataPointer to the data over which to calculate the CRC
[in]lengthNumber of bytes to process
Returns
Resulting CRC value

Definition at line 687 of file pic32mx_eth_driver.c.

◆ pic32mxEthDisableIrq()

void pic32mxEthDisableIrq ( NetInterface interface)

Disable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 319 of file pic32mx_eth_driver.c.

◆ pic32mxEthEnableIrq()

void pic32mxEthEnableIrq ( NetInterface interface)

Enable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 305 of file pic32mx_eth_driver.c.

◆ pic32mxEthEventHandler()

void pic32mxEthEventHandler ( NetInterface interface)

PIC32MX Ethernet MAC event handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 385 of file pic32mx_eth_driver.c.

◆ pic32mxEthInit()

error_t pic32mxEthInit ( NetInterface interface)

PIC32MX Ethernet MAC initialization.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 92 of file pic32mx_eth_driver.c.

◆ pic32mxEthInitBufferDesc()

void pic32mxEthInitBufferDesc ( NetInterface interface)

Initialize DMA descriptor lists.

Parameters
[in]interfaceUnderlying network interface

Definition at line 227 of file pic32mx_eth_driver.c.

◆ pic32mxEthInitGpio()

void pic32mxEthInitGpio ( NetInterface interface)

◆ pic32mxEthIrqHandler()

void pic32mxEthIrqHandler ( void  )

PIC32MX Ethernet MAC interrupt service routine.

Definition at line 332 of file pic32mx_eth_driver.c.

◆ pic32mxEthReadPhyReg()

uint16_t pic32mxEthReadPhyReg ( uint8_t  phyAddr,
uint8_t  regAddr 
)

Read PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
Returns
Register value

Definition at line 658 of file pic32mx_eth_driver.c.

◆ pic32mxEthReceivePacket()

error_t pic32mxEthReceivePacket ( NetInterface interface)

Receive a packet.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 471 of file pic32mx_eth_driver.c.

◆ pic32mxEthSendPacket()

error_t pic32mxEthSendPacket ( NetInterface interface,
const NetBuffer buffer,
size_t  offset 
)

Send a packet.

Parameters
[in]interfaceUnderlying network interface
[in]bufferMulti-part buffer containing the data to send
[in]offsetOffset to the first data byte
Returns
Error code

Definition at line 415 of file pic32mx_eth_driver.c.

◆ pic32mxEthTick()

void pic32mxEthTick ( NetInterface interface)

PIC32MX Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters
[in]interfaceUnderlying network interface

Definition at line 293 of file pic32mx_eth_driver.c.

◆ pic32mxEthUpdateMacAddrFilter()

error_t pic32mxEthUpdateMacAddrFilter ( NetInterface interface)

Configure MAC address filtering.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 539 of file pic32mx_eth_driver.c.

◆ pic32mxEthUpdateMacConfig()

error_t pic32mxEthUpdateMacConfig ( NetInterface interface)

Adjust MAC configuration parameters for proper operation.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 592 of file pic32mx_eth_driver.c.

◆ pic32mxEthWritePhyReg()

void pic32mxEthWritePhyReg ( uint8_t  phyAddr,
uint8_t  regAddr,
uint16_t  data 
)

Write PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
[in]dataRegister value

Definition at line 634 of file pic32mx_eth_driver.c.

Variable Documentation

◆ pic32mxEthDriver

const NicDriver pic32mxEthDriver

PIC32MX Ethernet MAC driver.

Definition at line 65 of file pic32mx_eth_driver.c.