pic32mx_eth_driver.h
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1 /**
2  * @file pic32mx_eth_driver.h
3  * @brief PIC32MX Ethernet MAC controller
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _PIC32MX_ETH_DRIVER_H
30 #define _PIC32MX_ETH_DRIVER_H
31 
32 //Dependencies
33 #include "core/nic.h"
34 
35 //Number of TX buffers
36 #ifndef PIC32MX_ETH_TX_BUFFER_COUNT
37  #define PIC32MX_ETH_TX_BUFFER_COUNT 2
38 #elif (PIC32MX_ETH_TX_BUFFER_COUNT < 1)
39  #error PIC32MX_ETH_TX_BUFFER_COUNT parameter is not valid
40 #endif
41 
42 //TX buffer size
43 #ifndef PIC32MX_ETH_TX_BUFFER_SIZE
44  #define PIC32MX_ETH_TX_BUFFER_SIZE 1536
45 #elif (PIC32MX_ETH_TX_BUFFER_SIZE != 1536)
46  #error PIC32MX_ETH_TX_BUFFER_SIZE parameter is not valid
47 #endif
48 
49 //Number of RX buffers
50 #ifndef PIC32MX_ETH_RX_BUFFER_COUNT
51  #define PIC32MX_ETH_RX_BUFFER_COUNT 4
52 #elif (PIC32MX_ETH_RX_BUFFER_COUNT < 1)
53  #error PIC32MX_ETH_RX_BUFFER_COUNT parameter is not valid
54 #endif
55 
56 //RX buffer size
57 #ifndef PIC32MX_ETH_RX_BUFFER_SIZE
58  #define PIC32MX_ETH_RX_BUFFER_SIZE 1536
59 #elif (PIC32MX_ETH_RX_BUFFER_SIZE != 1536)
60  #error PIC32MX_ETH_RX_BUFFER_SIZE parameter is not valid
61 #endif
62 
63 //Ethernet interrupt priority
64 #ifndef PIC32MX_ETH_IRQ_PRIORITY
65  #define PIC32MX_ETH_IRQ_PRIORITY 2
66 #elif (PIC32MX_ETH_IRQ_PRIORITY < 0)
67  #error PIC32MX_ETH_IRQ_PRIORITY parameter is not valid
68 #endif
69 
70 //Ethernet interrupt subpriority
71 #ifndef PIC32MX_ETH_IRQ_SUB_PRIORITY
72  #define PIC32MX_ETH_IRQ_SUB_PRIORITY 0
73 #elif (PIC32MX_ETH_IRQ_SUB_PRIORITY < 0)
74  #error PIC32MX_ETH_IRQ_SUB_PRIORITY parameter is not valid
75 #endif
76 
77 //EMAC1MCFG register
78 #define _EMAC1MCFG_CLKSEL_DIV4 (0 << _EMAC1MCFG_CLKSEL_POSITION)
79 #define _EMAC1MCFG_CLKSEL_DIV6 (2 << _EMAC1MCFG_CLKSEL_POSITION)
80 #define _EMAC1MCFG_CLKSEL_DIV8 (3 << _EMAC1MCFG_CLKSEL_POSITION)
81 #define _EMAC1MCFG_CLKSEL_DIV10 (4 << _EMAC1MCFG_CLKSEL_POSITION)
82 #define _EMAC1MCFG_CLKSEL_DIV14 (5 << _EMAC1MCFG_CLKSEL_POSITION)
83 #define _EMAC1MCFG_CLKSEL_DIV20 (6 << _EMAC1MCFG_CLKSEL_POSITION)
84 #define _EMAC1MCFG_CLKSEL_DIV28 (7 << _EMAC1MCFG_CLKSEL_POSITION)
85 #define _EMAC1MCFG_CLKSEL_DIV40 (8 << _EMAC1MCFG_CLKSEL_POSITION)
86 
87 //Transmit buffer descriptor flags
88 #define ETH_TX_CTRL_SOP 0x80000000
89 #define ETH_TX_CTRL_EOP 0x40000000
90 #define ETH_TX_CTRL_BYTE_COUNT 0x07FF0000
91 #define ETH_TX_CTRL_NPV 0x00000100
92 #define ETH_TX_CTRL_EOWN 0x00000080
93 #define ETH_TX_STATUS1_VLAN 0x00080000
94 #define ETH_TX_STATUS1_BACKPRESSURE 0x00040000
95 #define ETH_TX_STATUS1_PAUSE 0x00020000
96 #define ETH_TX_STATUS1_CONTROL 0x00010000
97 #define ETH_TX_STATUS1_TOTAL_BYTES 0x0000FFFF
98 #define ETH_TX_STATUS2_UNDERRUN 0x80000000
99 #define ETH_TX_STATUS2_GIANT 0x40000000
100 #define ETH_TX_STATUS2_LATE_COL 0x20000000
101 #define ETH_TX_STATUS2_MAX_COL 0x10000000
102 #define ETH_TX_STATUS2_EXCESSIVE_DEFER 0x08000000
103 #define ETH_TX_STATUS2_PACKET_DEFER 0x04000000
104 #define ETH_TX_STATUS2_BROADCAST 0x02000000
105 #define ETH_TX_STATUS2_MULTICAST 0x01000000
106 #define ETH_TX_STATUS2_DONE 0x00800000
107 #define ETH_TX_STATUS2_LEN_OUT_OF_RANGE 0x00400000
108 #define ETH_TX_STATUS2_LEN_CHECK_ERROR 0x00200000
109 #define ETH_TX_STATUS2_CRC_ERROR 0x00100000
110 #define ETH_TX_STATUS2_COL_COUNT 0x000F0000
111 #define ETH_TX_STATUS2_BYTE_COUNT 0x0000FFFF
112 
113 //Receive buffer descriptor flags
114 #define ETH_RX_CTRL_SOP 0x80000000
115 #define ETH_RX_CTRL_EOP 0x40000000
116 #define ETH_RX_CTRL_BYTE_COUNT 0x07FF0000
117 #define ETH_RX_CTRL_NPV 0x00000100
118 #define ETH_RX_CTRL_EOWN 0x00000080
119 #define ETH_RX_STATUS1_MULTICAST_MATCH 0x80000000
120 #define ETH_RX_STATUS1_BROADCAST_MATCH 0x40000000
121 #define ETH_RX_STATUS1_UNICAST_MATCH 0x20000000
122 #define ETH_RX_STATUS1_PATTERN_MATCH 0x10000000
123 #define ETH_RX_STATUS1_MAGIC_PACKET_MATCH 0x08000000
124 #define ETH_RX_STATUS1_HASH_TABLE_MATCH 0x04000000
125 #define ETH_RX_STATUS1_NOT_MATCH 0x02000000
126 #define ETH_RX_STATUS1_RUNT_PACKET 0x01000000
127 #define ETH_RX_STATUS1_PACKET_CHECKSUM 0x0000FFFF
128 #define ETH_RX_STATUS2_VLAN 0x40000000
129 #define ETH_RX_STATUS2_UNKNOWN_OP_CODE 0x20000000
130 #define ETH_RX_STATUS2_PAUSE 0x10000000
131 #define ETH_RX_STATUS2_CONTROL 0x08000000
132 #define ETH_RX_STATUS2_DRIBBLE_NIBBLE 0x04000000
133 #define ETH_RX_STATUS2_BROADCAST 0x02000000
134 #define ETH_RX_STATUS2_MULTICAST 0x01000000
135 #define ETH_RX_STATUS2_OK 0x00800000
136 #define ETH_RX_STATUS2_LEN_OUT_OF_RANGE 0x00400000
137 #define ETH_RX_STATUS2_LEN_CHECK_ERROR 0x00200000
138 #define ETH_RX_STATUS2_CRC_ERROR 0x00100000
139 #define ETH_RX_STATUS2_CODE_VIOLATION 0x00080000
140 #define ETH_RX_STATUS2_CARRIER_EVENT 0x00040000
141 #define ETH_RX_STATUS2_RXDV_EVENT 0x00020000
142 #define ETH_RX_STATUS2_LONG_EVENT 0x00010000
143 #define ETH_RX_STATUS2_BYTE_COUNT 0x0000FFFF
144 
145 //C++ guard
146 #ifdef __cplusplus
147  extern "C" {
148 #endif
149 
150 
151 /**
152  * @brief TX buffer descriptor
153  **/
154 
155 typedef struct
156 {
157  uint32_t control;
158  uint32_t address;
159  uint32_t status1;
160  uint32_t status2;
161  uint32_t next;
163 
164 
165 /**
166  * @brief RX buffer descriptor
167  **/
168 
169 typedef struct
170 {
171  uint32_t control;
172  uint32_t address;
173  uint32_t status1;
174  uint32_t status2;
175  uint32_t next;
177 
178 
179 //PIC32MX Ethernet MAC driver
180 extern const NicDriver pic32mxEthDriver;
181 
182 //PIC32MX Ethernet MAC related functions
184 void pic32mxEthInitGpio(NetInterface *interface);
185 void pic32mxEthInitBufferDesc(NetInterface *interface);
186 
187 void pic32mxEthTick(NetInterface *interface);
188 
189 void pic32mxEthEnableIrq(NetInterface *interface);
190 void pic32mxEthDisableIrq(NetInterface *interface);
191 void pic32mxEthIrqHandler(void);
192 void pic32mxEthEventHandler(NetInterface *interface);
193 
195  const NetBuffer *buffer, size_t offset);
196 
198 
201 
202 void pic32mxEthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
203 uint16_t pic32mxEthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
204 
205 uint32_t pic32mxEthCalcCrc(const void *data, size_t length);
206 
207 //C++ guard
208 #ifdef __cplusplus
209  }
210 #endif
211 
212 #endif
error_t pic32mxEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
uint16_t pic32mxEthReadPhyReg(uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void pic32mxEthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
void pic32mxEthDisableIrq(NetInterface *interface)
Disable interrupts.
void pic32mxEthTick(NetInterface *interface)
PIC32MX Ethernet MAC timer handler.
void pic32mxEthIrqHandler(void)
PIC32MX Ethernet MAC interrupt service routine.
void pic32mxEthEnableIrq(NetInterface *interface)
Enable interrupts.
error_t pic32mxEthInit(NetInterface *interface)
PIC32MX Ethernet MAC initialization.
void pic32mxEthInitBufferDesc(NetInterface *interface)
Initialize DMA descriptor lists.
RX buffer descriptor.
NIC driver.
Definition: nic.h:161
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:86
error_t pic32mxEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
TX buffer descriptor.
uint16_t regAddr
error_t
Error codes.
Definition: error.h:40
error_t pic32mxEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
void pic32mxEthEventHandler(NetInterface *interface)
PIC32MX Ethernet MAC event handler.
void pic32mxEthInitGpio(NetInterface *interface)
error_t pic32mxEthReceivePacket(NetInterface *interface)
Receive a packet.
uint32_t pic32mxEthCalcCrc(const void *data, size_t length)
CRC calculation.
uint8_t length
Definition: dtls_misc.h:140
Network interface controller abstraction layer.
const NicDriver pic32mxEthDriver
PIC32MX Ethernet MAC driver.