sama5d3_eth_driver.h File Reference

SAMA5D3 Ethernet MAC controller. More...

Go to the source code of this file.

Data Structures

struct  Sama5d3TxBufferDesc
 Transmit buffer descriptor. More...
 
struct  Sama5d3RxBufferDesc
 Receive buffer descriptor. More...
 

Macros

#define SAMA5D3_ETH_TX_BUFFER_COUNT   4
 
#define SAMA5D3_ETH_TX_BUFFER_SIZE   1536
 
#define SAMA5D3_ETH_RX_BUFFER_COUNT   96
 
#define SAMA5D3_ETH_RX_BUFFER_SIZE   128
 
#define SAMA5D3_ETH_IRQ_PRIORITY   0
 
#define EMAC_RMII_MASK
 
#define EMAC_TX_USED   0x80000000
 
#define EMAC_TX_WRAP   0x40000000
 
#define EMAC_TX_ERROR   0x20000000
 
#define EMAC_TX_UNDERRUN   0x10000000
 
#define EMAC_TX_EXHAUSTED   0x08000000
 
#define EMAC_TX_NO_CRC   0x00010000
 
#define EMAC_TX_LAST   0x00008000
 
#define EMAC_TX_LENGTH   0x000007FF
 
#define EMAC_RX_ADDRESS   0xFFFFFFFC
 
#define EMAC_RX_WRAP   0x00000002
 
#define EMAC_RX_OWNERSHIP   0x00000001
 
#define EMAC_RX_BROADCAST   0x80000000
 
#define EMAC_RX_MULTICAST_HASH   0x40000000
 
#define EMAC_RX_UNICAST_HASH   0x20000000
 
#define EMAC_RX_EXT_ADDR   0x10000000
 
#define EMAC_RX_SAR1   0x04000000
 
#define EMAC_RX_SAR2   0x02000000
 
#define EMAC_RX_SAR3   0x01000000
 
#define EMAC_RX_SAR4   0x00800000
 
#define EMAC_RX_TYPE_ID   0x00400000
 
#define EMAC_RX_VLAN_TAG   0x00200000
 
#define EMAC_RX_PRIORITY_TAG   0x00100000
 
#define EMAC_RX_VLAN_PRIORITY   0x000E0000
 
#define EMAC_RX_CFI   0x00010000
 
#define EMAC_RX_EOF   0x00008000
 
#define EMAC_RX_SOF   0x00004000
 
#define EMAC_RX_OFFSET   0x00003000
 
#define EMAC_RX_LENGTH   0x00000FFF
 

Functions

error_t sama5d3EthInit (NetInterface *interface)
 SAMA5D3 Ethernet MAC initialization. More...
 
void sama5d3EthInitGpio (NetInterface *interface)
 
void sama5d3EthInitBufferDesc (NetInterface *interface)
 Initialize buffer descriptors. More...
 
void sama5d3EthTick (NetInterface *interface)
 SAMA5D3 Ethernet MAC timer handler. More...
 
void sama5d3EthEnableIrq (NetInterface *interface)
 Enable interrupts. More...
 
void sama5d3EthDisableIrq (NetInterface *interface)
 Disable interrupts. More...
 
void sama5d3EthIrqHandler (void)
 SAMA5D3 Ethernet MAC interrupt service routine. More...
 
void sama5d3EthEventHandler (NetInterface *interface)
 SAMA5D3 Ethernet MAC event handler. More...
 
error_t sama5d3EthSendPacket (NetInterface *interface, const NetBuffer *buffer, size_t offset)
 Send a packet. More...
 
error_t sama5d3EthReceivePacket (NetInterface *interface)
 Receive a packet. More...
 
error_t sama5d3EthUpdateMacAddrFilter (NetInterface *interface)
 Configure MAC address filtering. More...
 
error_t sama5d3EthUpdateMacConfig (NetInterface *interface)
 Adjust MAC configuration parameters for proper operation. More...
 
void sama5d3EthWritePhyReg (uint8_t phyAddr, uint8_t regAddr, uint16_t data)
 Write PHY register. More...
 
uint16_t sama5d3EthReadPhyReg (uint8_t phyAddr, uint8_t regAddr)
 Read PHY register. More...
 

Variables

const NicDriver sama5d3EthDriver
 SAMA5D3 Ethernet MAC driver. More...
 

Detailed Description

SAMA5D3 Ethernet MAC controller.

License

Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author
Oryx Embedded SARL (www.oryx-embedded.com)
Version
1.9.0

Definition in file sama5d3_eth_driver.h.

Macro Definition Documentation

◆ EMAC_RMII_MASK

#define EMAC_RMII_MASK
Value:
(PIO_PC9A_EMDIO | PIO_PC8A_EMDC | \
PIO_PC7A_EREFCK | PIO_PC6A_ERXER | PIO_PC5A_ECRSDV | PIO_PC4A_ETXEN | \
PIO_PC3A_ERX1 | PIO_PC2A_ERX0 | PIO_PC1A_ETX1 | PIO_PC0A_ETX0)

Definition at line 68 of file sama5d3_eth_driver.h.

◆ EMAC_RX_ADDRESS

#define EMAC_RX_ADDRESS   0xFFFFFFFC

Definition at line 83 of file sama5d3_eth_driver.h.

◆ EMAC_RX_BROADCAST

#define EMAC_RX_BROADCAST   0x80000000

Definition at line 86 of file sama5d3_eth_driver.h.

◆ EMAC_RX_CFI

#define EMAC_RX_CFI   0x00010000

Definition at line 98 of file sama5d3_eth_driver.h.

◆ EMAC_RX_EOF

#define EMAC_RX_EOF   0x00008000

Definition at line 99 of file sama5d3_eth_driver.h.

◆ EMAC_RX_EXT_ADDR

#define EMAC_RX_EXT_ADDR   0x10000000

Definition at line 89 of file sama5d3_eth_driver.h.

◆ EMAC_RX_LENGTH

#define EMAC_RX_LENGTH   0x00000FFF

Definition at line 102 of file sama5d3_eth_driver.h.

◆ EMAC_RX_MULTICAST_HASH

#define EMAC_RX_MULTICAST_HASH   0x40000000

Definition at line 87 of file sama5d3_eth_driver.h.

◆ EMAC_RX_OFFSET

#define EMAC_RX_OFFSET   0x00003000

Definition at line 101 of file sama5d3_eth_driver.h.

◆ EMAC_RX_OWNERSHIP

#define EMAC_RX_OWNERSHIP   0x00000001

Definition at line 85 of file sama5d3_eth_driver.h.

◆ EMAC_RX_PRIORITY_TAG

#define EMAC_RX_PRIORITY_TAG   0x00100000

Definition at line 96 of file sama5d3_eth_driver.h.

◆ EMAC_RX_SAR1

#define EMAC_RX_SAR1   0x04000000

Definition at line 90 of file sama5d3_eth_driver.h.

◆ EMAC_RX_SAR2

#define EMAC_RX_SAR2   0x02000000

Definition at line 91 of file sama5d3_eth_driver.h.

◆ EMAC_RX_SAR3

#define EMAC_RX_SAR3   0x01000000

Definition at line 92 of file sama5d3_eth_driver.h.

◆ EMAC_RX_SAR4

#define EMAC_RX_SAR4   0x00800000

Definition at line 93 of file sama5d3_eth_driver.h.

◆ EMAC_RX_SOF

#define EMAC_RX_SOF   0x00004000

Definition at line 100 of file sama5d3_eth_driver.h.

◆ EMAC_RX_TYPE_ID

#define EMAC_RX_TYPE_ID   0x00400000

Definition at line 94 of file sama5d3_eth_driver.h.

◆ EMAC_RX_UNICAST_HASH

#define EMAC_RX_UNICAST_HASH   0x20000000

Definition at line 88 of file sama5d3_eth_driver.h.

◆ EMAC_RX_VLAN_PRIORITY

#define EMAC_RX_VLAN_PRIORITY   0x000E0000

Definition at line 97 of file sama5d3_eth_driver.h.

◆ EMAC_RX_VLAN_TAG

#define EMAC_RX_VLAN_TAG   0x00200000

Definition at line 95 of file sama5d3_eth_driver.h.

◆ EMAC_RX_WRAP

#define EMAC_RX_WRAP   0x00000002

Definition at line 84 of file sama5d3_eth_driver.h.

◆ EMAC_TX_ERROR

#define EMAC_TX_ERROR   0x20000000

Definition at line 75 of file sama5d3_eth_driver.h.

◆ EMAC_TX_EXHAUSTED

#define EMAC_TX_EXHAUSTED   0x08000000

Definition at line 77 of file sama5d3_eth_driver.h.

◆ EMAC_TX_LAST

#define EMAC_TX_LAST   0x00008000

Definition at line 79 of file sama5d3_eth_driver.h.

◆ EMAC_TX_LENGTH

#define EMAC_TX_LENGTH   0x000007FF

Definition at line 80 of file sama5d3_eth_driver.h.

◆ EMAC_TX_NO_CRC

#define EMAC_TX_NO_CRC   0x00010000

Definition at line 78 of file sama5d3_eth_driver.h.

◆ EMAC_TX_UNDERRUN

#define EMAC_TX_UNDERRUN   0x10000000

Definition at line 76 of file sama5d3_eth_driver.h.

◆ EMAC_TX_USED

#define EMAC_TX_USED   0x80000000

Definition at line 73 of file sama5d3_eth_driver.h.

◆ EMAC_TX_WRAP

#define EMAC_TX_WRAP   0x40000000

Definition at line 74 of file sama5d3_eth_driver.h.

◆ SAMA5D3_ETH_IRQ_PRIORITY

#define SAMA5D3_ETH_IRQ_PRIORITY   0

Definition at line 62 of file sama5d3_eth_driver.h.

◆ SAMA5D3_ETH_RX_BUFFER_COUNT

#define SAMA5D3_ETH_RX_BUFFER_COUNT   96

Definition at line 48 of file sama5d3_eth_driver.h.

◆ SAMA5D3_ETH_RX_BUFFER_SIZE

#define SAMA5D3_ETH_RX_BUFFER_SIZE   128

Definition at line 55 of file sama5d3_eth_driver.h.

◆ SAMA5D3_ETH_TX_BUFFER_COUNT

#define SAMA5D3_ETH_TX_BUFFER_COUNT   4

Definition at line 34 of file sama5d3_eth_driver.h.

◆ SAMA5D3_ETH_TX_BUFFER_SIZE

#define SAMA5D3_ETH_TX_BUFFER_SIZE   1536

Definition at line 41 of file sama5d3_eth_driver.h.

Function Documentation

◆ sama5d3EthDisableIrq()

void sama5d3EthDisableIrq ( NetInterface interface)

Disable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 308 of file sama5d3_eth_driver.c.

◆ sama5d3EthEnableIrq()

void sama5d3EthEnableIrq ( NetInterface interface)

Enable interrupts.

Parameters
[in]interfaceUnderlying network interface

Definition at line 292 of file sama5d3_eth_driver.c.

◆ sama5d3EthEventHandler()

void sama5d3EthEventHandler ( NetInterface interface)

SAMA5D3 Ethernet MAC event handler.

Parameters
[in]interfaceUnderlying network interface

Definition at line 379 of file sama5d3_eth_driver.c.

◆ sama5d3EthInit()

error_t sama5d3EthInit ( NetInterface interface)

SAMA5D3 Ethernet MAC initialization.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 117 of file sama5d3_eth_driver.c.

◆ sama5d3EthInitBufferDesc()

void sama5d3EthInitBufferDesc ( NetInterface interface)

Initialize buffer descriptors.

Parameters
[in]interfaceUnderlying network interface

Definition at line 227 of file sama5d3_eth_driver.c.

◆ sama5d3EthInitGpio()

void sama5d3EthInitGpio ( NetInterface interface)

◆ sama5d3EthIrqHandler()

void sama5d3EthIrqHandler ( void  )

SAMA5D3 Ethernet MAC interrupt service routine.

Definition at line 323 of file sama5d3_eth_driver.c.

◆ sama5d3EthReadPhyReg()

uint16_t sama5d3EthReadPhyReg ( uint8_t  phyAddr,
uint8_t  regAddr 
)

Read PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
Returns
Register value

Definition at line 716 of file sama5d3_eth_driver.c.

◆ sama5d3EthReceivePacket()

error_t sama5d3EthReceivePacket ( NetInterface interface)

Receive a packet.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 478 of file sama5d3_eth_driver.c.

◆ sama5d3EthSendPacket()

error_t sama5d3EthSendPacket ( NetInterface interface,
const NetBuffer buffer,
size_t  offset 
)

Send a packet.

Parameters
[in]interfaceUnderlying network interface
[in]bufferMulti-part buffer containing the data to send
[in]offsetOffset to the first data byte
Returns
Error code

Definition at line 413 of file sama5d3_eth_driver.c.

◆ sama5d3EthTick()

void sama5d3EthTick ( NetInterface interface)

SAMA5D3 Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters
[in]interfaceUnderlying network interface

Definition at line 280 of file sama5d3_eth_driver.c.

◆ sama5d3EthUpdateMacAddrFilter()

error_t sama5d3EthUpdateMacAddrFilter ( NetInterface interface)

Configure MAC address filtering.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 592 of file sama5d3_eth_driver.c.

◆ sama5d3EthUpdateMacConfig()

error_t sama5d3EthUpdateMacConfig ( NetInterface interface)

Adjust MAC configuration parameters for proper operation.

Parameters
[in]interfaceUnderlying network interface
Returns
Error code

Definition at line 655 of file sama5d3_eth_driver.c.

◆ sama5d3EthWritePhyReg()

void sama5d3EthWritePhyReg ( uint8_t  phyAddr,
uint8_t  regAddr,
uint16_t  data 
)

Write PHY register.

Parameters
[in]phyAddrPHY address
[in]regAddrRegister address
[in]dataRegister value

Definition at line 689 of file sama5d3_eth_driver.c.

Variable Documentation

◆ sama5d3EthDriver

const NicDriver sama5d3EthDriver

SAMA5D3 Ethernet MAC driver.

Definition at line 90 of file sama5d3_eth_driver.c.