sama5d3_eth_driver.h
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1 /**
2  * @file sama5d3_eth_driver.h
3  * @brief SAMA5D3 Ethernet MAC controller
4  *
5  * @section License
6  *
7  * Copyright (C) 2010-2018 Oryx Embedded SARL. All rights reserved.
8  *
9  * This file is part of CycloneTCP Open.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License
13  * as published by the Free Software Foundation; either version 2
14  * of the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software Foundation,
23  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
24  *
25  * @author Oryx Embedded SARL (www.oryx-embedded.com)
26  * @version 1.9.0
27  **/
28 
29 #ifndef _SAMA5D3_ETH_DRIVER_H
30 #define _SAMA5D3_ETH_DRIVER_H
31 
32 //Number of TX buffers
33 #ifndef SAMA5D3_ETH_TX_BUFFER_COUNT
34  #define SAMA5D3_ETH_TX_BUFFER_COUNT 4
35 #elif (SAMA5D3_ETH_TX_BUFFER_COUNT < 1)
36  #error SAMA5D3_ETH_TX_BUFFER_COUNT parameter is not valid
37 #endif
38 
39 //TX buffer size
40 #ifndef SAMA5D3_ETH_TX_BUFFER_SIZE
41  #define SAMA5D3_ETH_TX_BUFFER_SIZE 1536
42 #elif (SAMA5D3_ETH_TX_BUFFER_SIZE != 1536)
43  #error SAMA5D3_ETH_TX_BUFFER_SIZE parameter is not valid
44 #endif
45 
46 //Number of RX buffers
47 #ifndef SAMA5D3_ETH_RX_BUFFER_COUNT
48  #define SAMA5D3_ETH_RX_BUFFER_COUNT 96
49 #elif (SAMA5D3_ETH_RX_BUFFER_COUNT < 12)
50  #error SAMA5D3_ETH_RX_BUFFER_COUNT parameter is not valid
51 #endif
52 
53 //RX buffer size
54 #ifndef SAMA5D3_ETH_RX_BUFFER_SIZE
55  #define SAMA5D3_ETH_RX_BUFFER_SIZE 128
56 #elif (SAMA5D3_ETH_RX_BUFFER_SIZE != 128)
57  #error SAMA5D3_ETH_RX_BUFFER_SIZE parameter is not valid
58 #endif
59 
60 //Ethernet interrupt priority
61 #ifndef SAMA5D3_ETH_IRQ_PRIORITY
62  #define SAMA5D3_ETH_IRQ_PRIORITY 0
63 #elif (SAMA5D3_ETH_IRQ_PRIORITY < 0)
64  #error SAMA5D3_ETH_IRQ_PRIORITY parameter is not valid
65 #endif
66 
67 //RMII signals
68 #define EMAC_RMII_MASK (PIO_PC9A_EMDIO | PIO_PC8A_EMDC | \
69  PIO_PC7A_EREFCK | PIO_PC6A_ERXER | PIO_PC5A_ECRSDV | PIO_PC4A_ETXEN | \
70  PIO_PC3A_ERX1 | PIO_PC2A_ERX0 | PIO_PC1A_ETX1 | PIO_PC0A_ETX0)
71 
72 //TX buffer descriptor flags
73 #define EMAC_TX_USED 0x80000000
74 #define EMAC_TX_WRAP 0x40000000
75 #define EMAC_TX_ERROR 0x20000000
76 #define EMAC_TX_UNDERRUN 0x10000000
77 #define EMAC_TX_EXHAUSTED 0x08000000
78 #define EMAC_TX_NO_CRC 0x00010000
79 #define EMAC_TX_LAST 0x00008000
80 #define EMAC_TX_LENGTH 0x000007FF
81 
82 //RX buffer descriptor flags
83 #define EMAC_RX_ADDRESS 0xFFFFFFFC
84 #define EMAC_RX_WRAP 0x00000002
85 #define EMAC_RX_OWNERSHIP 0x00000001
86 #define EMAC_RX_BROADCAST 0x80000000
87 #define EMAC_RX_MULTICAST_HASH 0x40000000
88 #define EMAC_RX_UNICAST_HASH 0x20000000
89 #define EMAC_RX_EXT_ADDR 0x10000000
90 #define EMAC_RX_SAR1 0x04000000
91 #define EMAC_RX_SAR2 0x02000000
92 #define EMAC_RX_SAR3 0x01000000
93 #define EMAC_RX_SAR4 0x00800000
94 #define EMAC_RX_TYPE_ID 0x00400000
95 #define EMAC_RX_VLAN_TAG 0x00200000
96 #define EMAC_RX_PRIORITY_TAG 0x00100000
97 #define EMAC_RX_VLAN_PRIORITY 0x000E0000
98 #define EMAC_RX_CFI 0x00010000
99 #define EMAC_RX_EOF 0x00008000
100 #define EMAC_RX_SOF 0x00004000
101 #define EMAC_RX_OFFSET 0x00003000
102 #define EMAC_RX_LENGTH 0x00000FFF
103 
104 
105 #if !defined(_SAMA5D3_GIGABIT_ETH_H)
106 
107 //C++ guard
108 #ifdef __cplusplus
109  extern "C" {
110 #endif
111 
112 /**
113  * @brief Transmit buffer descriptor
114  **/
115 
116 typedef struct
117 {
118  uint32_t address;
119  uint32_t status;
121 
122 
123 /**
124  * @brief Receive buffer descriptor
125  **/
126 
127 typedef struct
128 {
129  uint32_t address;
130  uint32_t status;
132 
133 #endif
134 
135 
136 //SAMA5D3 Ethernet MAC driver
137 extern const NicDriver sama5d3EthDriver;
138 
139 //SAMA5D3 Ethernet MAC related functions
141 void sama5d3EthInitGpio(NetInterface *interface);
142 void sama5d3EthInitBufferDesc(NetInterface *interface);
143 
144 void sama5d3EthTick(NetInterface *interface);
145 
146 void sama5d3EthEnableIrq(NetInterface *interface);
147 void sama5d3EthDisableIrq(NetInterface *interface);
148 void sama5d3EthIrqHandler(void);
149 void sama5d3EthEventHandler(NetInterface *interface);
150 
152  const NetBuffer *buffer, size_t offset);
153 
155 
158 
159 void sama5d3EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
160 uint16_t sama5d3EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
161 
162 //C++ guard
163 #ifdef __cplusplus
164  }
165 #endif
166 
167 #endif
void sama5d3EthEventHandler(NetInterface *interface)
SAMA5D3 Ethernet MAC event handler.
void sama5d3EthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
void sama5d3EthIrqHandler(void)
SAMA5D3 Ethernet MAC interrupt service routine.
void sama5d3EthTick(NetInterface *interface)
SAMA5D3 Ethernet MAC timer handler.
void sama5d3EthDisableIrq(NetInterface *interface)
Disable interrupts.
Receive buffer descriptor.
Transmit buffer descriptor.
NIC driver.
Definition: nic.h:161
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:86
error_t sama5d3EthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
void sama5d3EthInitGpio(NetInterface *interface)
uint16_t regAddr
const NicDriver sama5d3EthDriver
SAMA5D3 Ethernet MAC driver.
error_t sama5d3EthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
error_t
Error codes.
Definition: error.h:40
uint8_t data[]
Definition: dtls_misc.h:167
#define NetInterface
Definition: net.h:34
void sama5d3EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
void sama5d3EthEnableIrq(NetInterface *interface)
Enable interrupts.
error_t sama5d3EthInit(NetInterface *interface)
SAMA5D3 Ethernet MAC initialization.
error_t sama5d3EthReceivePacket(NetInterface *interface)
Receive a packet.
error_t sama5d3EthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
uint16_t sama5d3EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr)
Read PHY register.