32 #define TRACE_LEVEL NIC_TRACE_LEVEL
35 #include "fsl_device_registers.h"
44 #if defined(__ICCARM__)
47 #pragma data_alignment = 16
50 #pragma data_alignment = 16
53 #pragma data_alignment = 16
56 #pragma data_alignment = 16
78 static uint_t txBufferIndex;
80 static uint_t rxBufferIndex;
120 TRACE_INFO(
"Initializing Kinetis KV5x Ethernet MAC...\r\n");
123 nicDriverInterface = interface;
126 SYSMPU->CESR &= ~SYSMPU_CESR_VLD_MASK;
129 SIM->SCGC2 |= SIM_SCGC2_ENET_MASK;
135 ENET->ECR = ENET_ECR_RESET_MASK;
137 while((ENET->ECR & ENET_ECR_RESET_MASK) != 0)
143 ENET_RCR_MII_MODE_MASK;
148 ENET->MSCR = ENET_MSCR_MII_SPEED(49);
151 if(interface->phyDriver != NULL)
154 error = interface->phyDriver->init(interface);
156 else if(interface->switchDriver != NULL)
159 error = interface->switchDriver->init(interface);
174 value = interface->macAddr.b[5];
175 value |= (interface->macAddr.b[4] << 8);
176 ENET->PAUR = ENET_PAUR_PADDR2(
value) | ENET_PAUR_TYPE(0x8808);
179 value = interface->macAddr.b[3];
180 value |= (interface->macAddr.b[2] << 8);
181 value |= (interface->macAddr.b[1] << 16);
182 value |= (interface->macAddr.b[0] << 24);
183 ENET->PALR = ENET_PALR_PADDR1(
value);
198 ENET->ECR = ENET_ECR_DBSWP_MASK | ENET_ECR_EN1588_MASK;
201 ENET->MIBC = ENET_MIBC_MIB_CLEAR_MASK;
208 ENET->EIR = 0xFFFFFFFF;
210 ENET->EIMR = ENET_EIMR_TXF_MASK | ENET_EIMR_RXF_MASK | ENET_EIMR_EBERR_MASK;
228 ENET->ECR |= ENET_ECR_ETHEREN_MASK;
230 ENET->RDAR = ENET_RDAR_RDAR_MASK;
248 #if defined(USE_TWR_KV58F220M)
250 SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
253 PORTA->PCR[5] = PORT_PCR_MUX(4) | PORT_PCR_PE_MASK;
255 PORTA->PCR[7] = PORT_PCR_MUX(5) | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK;
257 PORTA->PCR[8] = PORT_PCR_MUX(5);
259 PORTA->PCR[9] = PORT_PCR_MUX(5);
261 PORTA->PCR[10] = PORT_PCR_MUX(5);
263 PORTA->PCR[11] = PORT_PCR_MUX(5);
265 PORTA->PCR[12] = PORT_PCR_MUX(5);
267 PORTA->PCR[13] = PORT_PCR_MUX(5);
269 PORTA->PCR[14] = PORT_PCR_MUX(5);
271 PORTA->PCR[15] = PORT_PCR_MUX(5);
273 PORTA->PCR[16] = PORT_PCR_MUX(5);
275 PORTA->PCR[17] = PORT_PCR_MUX(5);
277 PORTA->PCR[24] = PORT_PCR_MUX(5);
279 PORTA->PCR[25] = PORT_PCR_MUX(5);
281 PORTA->PCR[26] = PORT_PCR_MUX(5);
283 PORTA->PCR[27] = PORT_PCR_MUX(5);
285 PORTA->PCR[29] = PORT_PCR_MUX(5);
301 osMemset(txBufferDesc, 0,
sizeof(txBufferDesc));
302 osMemset(rxBufferDesc, 0,
sizeof(rxBufferDesc));
339 ENET->TDSR = (uint32_t) txBufferDesc;
341 ENET->RDSR = (uint32_t) rxBufferDesc;
359 if(interface->phyDriver != NULL)
362 interface->phyDriver->tick(interface);
364 else if(interface->switchDriver != NULL)
367 interface->switchDriver->tick(interface);
384 NVIC_EnableIRQ(ENET_Transmit_IRQn);
385 NVIC_EnableIRQ(ENET_Receive_IRQn);
386 NVIC_EnableIRQ(ENET_Error_IRQn);
389 if(interface->phyDriver != NULL)
392 interface->phyDriver->enableIrq(interface);
394 else if(interface->switchDriver != NULL)
397 interface->switchDriver->enableIrq(interface);
414 NVIC_DisableIRQ(ENET_Transmit_IRQn);
415 NVIC_DisableIRQ(ENET_Receive_IRQn);
416 NVIC_DisableIRQ(ENET_Error_IRQn);
419 if(interface->phyDriver != NULL)
422 interface->phyDriver->disableIrq(interface);
424 else if(interface->switchDriver != NULL)
427 interface->switchDriver->disableIrq(interface);
451 if((ENET->EIR & ENET_EIR_TXF_MASK) != 0)
454 ENET->EIR = ENET_EIR_TXF_MASK;
457 if((txBufferDesc[txBufferIndex][0] &
ENET_TBD0_R) == 0)
464 ENET->TDAR = ENET_TDAR_TDAR_MASK;
487 if((ENET->EIR & ENET_EIR_RXF_MASK) != 0)
490 ENET->EIMR &= ~ENET_EIMR_RXF_MASK;
493 nicDriverInterface->nicEvent =
TRUE;
518 if((ENET->EIR & ENET_EIR_EBERR_MASK) != 0)
521 ENET->EIMR &= ~ENET_EIMR_EBERR_MASK;
524 nicDriverInterface->nicEvent =
TRUE;
548 if((status & ENET_EIR_RXF_MASK) != 0)
551 ENET->EIR = ENET_EIR_RXF_MASK;
564 if((status & ENET_EIR_EBERR_MASK) != 0)
567 ENET->EIR = ENET_EIR_EBERR_MASK;
570 ENET->ECR &= ~ENET_ECR_ETHEREN_MASK;
574 ENET->ECR |= ENET_ECR_ETHEREN_MASK;
576 ENET->RDAR = ENET_RDAR_RDAR_MASK;
580 ENET->EIMR = ENET_EIMR_TXF_MASK | ENET_EIMR_RXF_MASK | ENET_EIMR_EBERR_MASK;
613 if((txBufferDesc[txBufferIndex][0] &
ENET_TBD0_R) != 0)
623 txBufferDesc[txBufferIndex][4] = 0;
649 ENET->TDAR = ENET_TDAR_TDAR_MASK;
652 if((txBufferDesc[txBufferIndex][0] &
ENET_TBD0_R) == 0)
677 if((rxBufferDesc[rxBufferIndex][0] &
ENET_RBD0_E) == 0)
680 if((rxBufferDesc[rxBufferIndex][0] &
ENET_RBD0_L) != 0)
716 rxBufferDesc[rxBufferIndex][4] = 0;
735 ENET->RDAR = ENET_RDAR_RDAR_MASK;
760 uint32_t unicastHashTable[2];
761 uint32_t multicastHashTable[2];
768 value = interface->macAddr.b[5];
769 value |= (interface->macAddr.b[4] << 8);
770 ENET->PAUR = ENET_PAUR_PADDR2(
value) | ENET_PAUR_TYPE(0x8808);
773 value = interface->macAddr.b[3];
774 value |= (interface->macAddr.b[2] << 8);
775 value |= (interface->macAddr.b[1] << 16);
776 value |= (interface->macAddr.b[0] << 24);
777 ENET->PALR = ENET_PALR_PADDR1(
value);
780 unicastHashTable[0] = 0;
781 unicastHashTable[1] = 0;
784 multicastHashTable[0] = 0;
785 multicastHashTable[1] = 0;
792 entry = &interface->macAddrFilter[i];
802 k = (crc >> 26) & 0x3F;
808 multicastHashTable[k / 32] |= (1 << (k % 32));
813 unicastHashTable[k / 32] |= (1 << (k % 32));
819 ENET->IALR = unicastHashTable[0];
820 ENET->IAUR = unicastHashTable[1];
823 ENET->GALR = multicastHashTable[0];
824 ENET->GAUR = multicastHashTable[1];
827 TRACE_DEBUG(
" IALR = %08" PRIX32
"\r\n", ENET->IALR);
828 TRACE_DEBUG(
" IAUR = %08" PRIX32
"\r\n", ENET->IAUR);
829 TRACE_DEBUG(
" GALR = %08" PRIX32
"\r\n", ENET->GALR);
830 TRACE_DEBUG(
" GAUR = %08" PRIX32
"\r\n", ENET->GAUR);
846 ENET->ECR &= ~ENET_ECR_ETHEREN_MASK;
852 ENET->RCR &= ~ENET_RCR_RMII_10T_MASK;
857 ENET->RCR |= ENET_RCR_RMII_10T_MASK;
864 ENET->TCR |= ENET_TCR_FDEN_MASK;
866 ENET->RCR &= ~ENET_RCR_DRT_MASK;
871 ENET->TCR &= ~ENET_TCR_FDEN_MASK;
873 ENET->RCR |= ENET_RCR_DRT_MASK;
880 ENET->ECR |= ENET_ECR_ETHEREN_MASK;
882 ENET->RDAR = ENET_RDAR_RDAR_MASK;
906 temp = ENET_MMFR_ST(1) | ENET_MMFR_OP(1) | ENET_MMFR_TA(2);
908 temp |= ENET_MMFR_PA(phyAddr);
912 temp |= ENET_MMFR_DATA(
data);
915 ENET->EIR = ENET_EIR_MII_MASK;
920 while((ENET->EIR & ENET_EIR_MII_MASK) == 0)
949 temp = ENET_MMFR_ST(1) | ENET_MMFR_OP(2) | ENET_MMFR_TA(2);
951 temp |= ENET_MMFR_PA(phyAddr);
956 ENET->EIR = ENET_EIR_MII_MASK;
961 while((ENET->EIR & ENET_EIR_MII_MASK) == 0)
966 data = ENET->MMFR & ENET_MMFR_DATA_MASK;
994 p = (uint8_t *)
data;
999 for(i = 0; i <
length; i++)
1005 for(j = 0; j < 8; j++)
1007 if((crc & 0x01) != 0)
1009 crc = (crc >> 1) ^ 0xEDB88320;
__attribute__((naked))
AVR32 Ethernet MAC interrupt wrapper.
@ ERROR_FAILURE
Generic error code.
#define macIsMulticastAddr(macAddr)
#define MAC_ADDR_FILTER_SIZE
#define ENET_RBD0_DATA_LENGTH
#define ENET_TBD0_DATA_LENGTH
void mkv5xEthDisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t mkv5xEthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void mkv5xEthTick(NetInterface *interface)
Kinetis KV5x Ethernet MAC timer handler.
void mkv5xEthEnableIrq(NetInterface *interface)
Enable interrupts.
void ENET_Receive_IRQHandler(void)
Ethernet MAC receive interrupt.
__weak_func void mkv5xEthInitGpio(NetInterface *interface)
GPIO configuration.
error_t mkv5xEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
error_t mkv5xEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
error_t mkv5xEthInit(NetInterface *interface)
Kinetis KV5x Ethernet MAC initialization.
error_t mkv5xEthReceivePacket(NetInterface *interface)
Receive a packet.
void ENET_Error_IRQHandler(void)
Ethernet MAC error interrupt.
void mkv5xEthEventHandler(NetInterface *interface)
Kinetis KV5x Ethernet MAC event handler.
const NicDriver mkv5xEthDriver
Kinetis KV5x Ethernet MAC driver.
void ENET_Transmit_IRQHandler(void)
Ethernet MAC transmit interrupt.
void mkv5xEthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
void mkv5xEthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
uint32_t mkv5xEthCalcCrc(const void *data, size_t length)
CRC calculation.
error_t mkv5xEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
NXP Kinetis KV5x Ethernet MAC driver.
#define MKV5X_ETH_RX_BUFFER_SIZE
#define MKV5X_ETH_TX_BUFFER_SIZE
#define MKV5X_ETH_IRQ_SUB_PRIORITY
#define MKV5X_ETH_IRQ_GROUP_PRIORITY
#define MKV5X_ETH_TX_BUFFER_COUNT
#define MKV5X_ETH_RX_BUFFER_COUNT
#define MKV5X_ETH_IRQ_PRIORITY_GROUPING
size_t netBufferGetLength(const NetBuffer *buffer)
Get the actual length of a multi-part buffer.
size_t netBufferRead(void *dest, const NetBuffer *src, size_t srcOffset, size_t length)
Read data from a multi-part buffer.
const NetRxAncillary NET_DEFAULT_RX_ANCILLARY
void nicProcessPacket(NetInterface *interface, uint8_t *packet, size_t length, NetRxAncillary *ancillary)
Handle a packet received by the network controller.
@ NIC_TYPE_ETHERNET
Ethernet interface.
#define osMemset(p, value, length)
#define osMemcpy(dest, src, length)
bool_t osSetEventFromIsr(OsEvent *event)
Set an event object to the signaled state from an interrupt service routine.
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
uint_t refCount
Reference count for the current entry.
Structure describing a buffer that spans multiple chunks.