mpc57xx_eth_driver.c
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1 /**
2  * @file mpc57xx_eth_driver.c
3  * @brief NXP MPC57xx Ethernet MAC controller
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2019 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 1.9.6
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "device_registers.h"
36 #include "core/net.h"
38 #include "debug.h"
39 
40 //Underlying network interface
41 static NetInterface *nicDriverInterface;
42 
43 //TX buffer
45  __attribute__((aligned(64)));
46 //RX buffer
48  __attribute__((aligned(64)));
49 //TX buffer descriptors
50 static uint32_t txBufferDesc[MPC57XX_ETH_TX_BUFFER_COUNT][8]
51  __attribute__((aligned(64)));
52 //RX buffer descriptors
53 static uint32_t rxBufferDesc[MPC57XX_ETH_RX_BUFFER_COUNT][8]
54  __attribute__((aligned(64)));
55 
56 
57 //TX buffer index
58 static uint_t txBufferIndex;
59 //RX buffer index
60 static uint_t rxBufferIndex;
61 
62 
63 /**
64  * @brief MPC57xx Ethernet MAC driver
65  **/
66 
68 {
70  ETH_MTU,
81  TRUE,
82  TRUE,
83  TRUE,
84  FALSE
85 };
86 
87 
88 /**
89  * @brief MPC57xx Ethernet MAC initialization
90  * @param[in] interface Underlying network interface
91  * @return Error code
92  **/
93 
95 {
96  error_t error;
97  uint32_t value;
98 
99  //Debug message
100  TRACE_INFO("Initializing MPC57xx Ethernet MAC...\r\n");
101 
102  //Save underlying network interface
103  nicDriverInterface = interface;
104 
105  //GPIO configuration
106  mpc57xxEthInitGpio(interface);
107 
108  //Reset ENET module
109  ENET_0->ECR = ENET_ECR_RESET_MASK;
110  //Wait for the reset to complete
111  while(ENET_0->ECR & ENET_ECR_RESET_MASK)
112  {
113  }
114 
115  //Receive control register
116  ENET_0->RCR = ENET_RCR_MAX_FL(MPC57XX_ETH_RX_BUFFER_SIZE) |
117  ENET_RCR_RMII_MODE_MASK | ENET_RCR_MII_MODE_MASK;
118 
119  //Transmit control register
120  ENET_0->TCR = 0;
121  //Configure MDC clock frequency
122  ENET_0->MSCR = ENET_MSCR_MII_SPEED(19);
123 
124  //PHY transceiver initialization
125  error = interface->phyDriver->init(interface);
126  //Failed to initialize PHY transceiver?
127  if(error)
128  return error;
129 
130  //Set the MAC address of the station (upper 16 bits)
131  value = interface->macAddr.b[5];
132  value |= (interface->macAddr.b[4] << 8);
133  ENET_0->PAUR = ENET_PAUR_PADDR2(value) | ENET_PAUR_TYPE(0x8808);
134 
135  //Set the MAC address of the station (lower 32 bits)
136  value = interface->macAddr.b[3];
137  value |= (interface->macAddr.b[2] << 8);
138  value |= (interface->macAddr.b[1] << 16);
139  value |= (interface->macAddr.b[0] << 24);
140  ENET_0->PALR = ENET_PALR_PADDR1(value);
141 
142  //Hash table for unicast address filtering
143  ENET_0->IALR = 0;
144  ENET_0->IAUR = 0;
145  //Hash table for multicast address filtering
146  ENET_0->GALR = 0;
147  ENET_0->GAUR = 0;
148 
149  //Disable transmit accelerator functions
150  ENET_0->TACC = 0;
151  //Disable receive accelerator functions
152  ENET_0->RACC = 0;
153 
154  //Use enhanced buffer descriptors
155  ENET_0->ECR = ENET_ECR_EN1588_MASK;
156 
157  //Reset statistics counters
158  ENET_0->MIBC = ENET_MIBC_MIB_CLEAR_MASK;
159  ENET_0->MIBC = 0;
160 
161  //Initialize buffer descriptors
162  mpc57xxEthInitBufferDesc(interface);
163 
164  //Clear any pending interrupts
165  ENET_0->EIR = 0xFFFFFFFF;
166  //Enable desired interrupts
167  ENET_0->EIMR = ENET_EIMR_TXF_MASK | ENET_EIMR_RXF_MASK | ENET_EIMR_EBERR_MASK;
168 
169  //Configure ENET transmit interrupt priority
170  INTC->PSR[ENET0_GROUP2_IRQn] = INTC_PSR_PRIN(MPC57XX_ETH_IRQ_PRIORITY);
171  //Configure ENET receive interrupt priority
172  INTC->PSR[ENET0_GROUP1_IRQn] = INTC_PSR_PRIN(MPC57XX_ETH_IRQ_PRIORITY);
173  //Configure ENET error interrupt priority
174  INTC->PSR[ENET0_GROUP0_IRQn] = INTC_PSR_PRIN(MPC57XX_ETH_IRQ_PRIORITY);
175 
176  //Enable Ethernet MAC
177  ENET_0->ECR |= ENET_ECR_ETHEREN_MASK;
178  //Instruct the DMA to poll the receive descriptor list
179  ENET_0->RDAR = ENET_RDAR_RDAR_MASK;
180 
181  //Accept any packets from the upper layer
182  osSetEvent(&interface->nicTxEvent);
183 
184  //Successful initialization
185  return NO_ERROR;
186 }
187 
188 
189 //DEVKIT-MPC5748G evaluation board?
190 #if defined(USE_DEVKIT_MPC5748G)
191 
192 /**
193  * @brief GPIO configuration
194  * @param[in] interface Underlying network interface
195  **/
196 
197 void mpc57xxEthInitGpio(NetInterface *interface)
198 {
199  //Configure MII_RMII_0_MDIO (PF14)
200  SIUL2->MSCR[94] = SIUL2_MSCR_SRC(3) | SIUL2_MSCR_OBE_MASK |
201  SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_IBE_MASK | SIUL2_MSCR_PUS_MASK |
202  SIUL2_MSCR_PUE_MASK | SIUL2_MSCR_SSS(4);
203  SIUL2->IMCR[450] = SIUL2_IMCR_SSS(1);
204 
205  //Configure MII_RMII_0_MDC (PG0)
206  SIUL2->MSCR[96] = SIUL2_MSCR_SRC(3) | SIUL2_MSCR_OBE_MASK |
207  SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_SSS(3);
208 
209  //Configure MII_RMII_0_TXD0 (PH1)
210  SIUL2->MSCR[113] = SIUL2_MSCR_SRC(3) | SIUL2_MSCR_OBE_MASK |
211  SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_SSS(4);
212 
213  //Configure MII_RMII_0_TXD1 (PH0)
214  SIUL2->MSCR[112] = SIUL2_MSCR_SRC(3) | SIUL2_MSCR_OBE_MASK |
215  SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_SSS(3);
216 
217  //Configure MII_RMII_0_TX_EN (PH2)
218  SIUL2->MSCR[114] = SIUL2_MSCR_SRC(3) | SIUL2_MSCR_OBE_MASK |
219  SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_SSS(4);
220 
221  //Configure MII_RMII_0_TX_CLK (PG1)
222  SIUL2->MSCR[97] = SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_IBE_MASK;
223  SIUL2->IMCR[449] = SIUL2_IMCR_SSS(1);
224 
225  //Configure MII_RMII_0_RXD0 (PA9)
226  SIUL2->MSCR[9] = SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_IBE_MASK;
227  SIUL2->IMCR[451] = SIUL2_IMCR_SSS(1);
228 
229  //Configure MII_RMII_0_RXD1 (PA8)
230  SIUL2->MSCR[8] = SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_IBE_MASK;
231  SIUL2->IMCR[452] = SIUL2_IMCR_SSS(1);
232 
233  //Configure MII_RMII_0_RX_ER (PA11)
234  SIUL2->MSCR[11] = SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_IBE_MASK;
235  SIUL2->IMCR[455] = SIUL2_IMCR_SSS(1);
236 
237  //Configure MII_RMII_0_RX_DV (PF15)
238  SIUL2->MSCR[95] = SIUL2_MSCR_SMC_MASK | SIUL2_MSCR_IBE_MASK;
239  SIUL2->IMCR[457] = SIUL2_IMCR_SSS(1);
240 }
241 
242 #endif
243 
244 
245 /**
246  * @brief Initialize buffer descriptors
247  * @param[in] interface Underlying network interface
248  **/
249 
251 {
252  uint_t i;
253  uint32_t address;
254 
255  //Clear TX and RX buffer descriptors
256  memset(txBufferDesc, 0, sizeof(txBufferDesc));
257  memset(rxBufferDesc, 0, sizeof(rxBufferDesc));
258 
259  //Initialize TX buffer descriptors
260  for(i = 0; i < MPC57XX_ETH_TX_BUFFER_COUNT; i++)
261  {
262  //Calculate the address of the current TX buffer
263  address = (uint32_t) txBuffer[i];
264  //Transmit buffer address
265  txBufferDesc[i][1] = address;
266  //Generate interrupts
267  txBufferDesc[i][2] = ENET_TBD2_INT;
268  }
269 
270  //Mark the last descriptor entry with the wrap flag
271  txBufferDesc[i - 1][0] |= ENET_TBD0_W;
272  //Initialize TX buffer index
273  txBufferIndex = 0;
274 
275  //Initialize RX buffer descriptors
276  for(i = 0; i < MPC57XX_ETH_RX_BUFFER_COUNT; i++)
277  {
278  //Calculate the address of the current RX buffer
279  address = (uint32_t) rxBuffer[i];
280  //The descriptor is initially owned by the DMA
281  rxBufferDesc[i][0] = ENET_RBD0_E;
282  //Receive buffer address
283  rxBufferDesc[i][1] = address;
284  //Generate interrupts
285  rxBufferDesc[i][2] = ENET_RBD2_INT;
286  }
287 
288  //Mark the last descriptor entry with the wrap flag
289  rxBufferDesc[i - 1][0] |= ENET_RBD0_W;
290  //Initialize RX buffer index
291  rxBufferIndex = 0;
292 
293  //Start location of the TX descriptor list
294  ENET_0->TDSR = (uint32_t) txBufferDesc;
295  //Start location of the RX descriptor list
296  ENET_0->RDSR = (uint32_t) rxBufferDesc;
297  //Maximum receive buffer size
298  ENET_0->MRBR = MPC57XX_ETH_RX_BUFFER_SIZE;
299 }
300 
301 
302 /**
303  * @brief MPC57xx Ethernet MAC timer handler
304  *
305  * This routine is periodically called by the TCP/IP stack to
306  * handle periodic operations such as polling the link state
307  *
308  * @param[in] interface Underlying network interface
309  **/
310 
311 void mpc57xxEthTick(NetInterface *interface)
312 {
313  //Handle periodic operations
314  interface->phyDriver->tick(interface);
315 }
316 
317 
318 /**
319  * @brief Enable interrupts
320  * @param[in] interface Underlying network interface
321  **/
322 
324 {
325  //Enable Ethernet MAC interrupts
326  INTC->PSR[ENET0_GROUP2_IRQn] |= INTC_PSR_PRC_SELN0_MASK;
327  INTC->PSR[ENET0_GROUP1_IRQn] |= INTC_PSR_PRC_SELN0_MASK;
328  INTC->PSR[ENET0_GROUP0_IRQn] |= INTC_PSR_PRC_SELN0_MASK;
329 
330  //Enable Ethernet PHY interrupts
331  interface->phyDriver->enableIrq(interface);
332 }
333 
334 
335 /**
336  * @brief Disable interrupts
337  * @param[in] interface Underlying network interface
338  **/
339 
341 {
342  //Disable Ethernet MAC interrupts
343  INTC->PSR[ENET0_GROUP2_IRQn] &= ~INTC_PSR_PRC_SELN0_MASK;
344  INTC->PSR[ENET0_GROUP1_IRQn] &= ~INTC_PSR_PRC_SELN0_MASK;
345  INTC->PSR[ENET0_GROUP0_IRQn] &= ~INTC_PSR_PRC_SELN0_MASK;
346 
347  //Disable Ethernet PHY interrupts
348  interface->phyDriver->disableIrq(interface);
349 }
350 
351 
352 /**
353  * @brief Ethernet MAC transmit interrupt
354  **/
355 
357 {
358  bool_t flag;
359 
360  //Interrupt service routine prologue
361  osEnterIsr();
362 
363  //This flag will be set if a higher priority task must be woken
364  flag = FALSE;
365 
366  //A packet has been transmitted?
367  if(ENET_0->EIR & ENET_EIR_TXF_MASK)
368  {
369  //Clear TXF interrupt flag
370  ENET_0->EIR = ENET_EIR_TXF_MASK;
371 
372  //Check whether the TX buffer is available for writing
373  if(!(txBufferDesc[txBufferIndex][0] & ENET_TBD0_R))
374  {
375  //Notify the TCP/IP stack that the transmitter is ready to send
376  flag = osSetEventFromIsr(&nicDriverInterface->nicTxEvent);
377  }
378 
379  //Instruct the DMA to poll the transmit descriptor list
380  ENET_0->TDAR = ENET_TDAR_TDAR_MASK;
381  }
382 
383  //Interrupt service routine epilogue
384  osExitIsr(flag);
385 }
386 
387 
388 /**
389  * @brief Ethernet MAC receive interrupt
390  **/
391 
393 {
394  bool_t flag;
395 
396  //Interrupt service routine prologue
397  osEnterIsr();
398 
399  //This flag will be set if a higher priority task must be woken
400  flag = FALSE;
401 
402  //A packet has been received?
403  if(ENET_0->EIR & ENET_EIR_RXF_MASK)
404  {
405  //Disable RXF interrupt
406  ENET_0->EIMR &= ~ENET_EIMR_RXF_MASK;
407 
408  //Set event flag
409  nicDriverInterface->nicEvent = TRUE;
410  //Notify the TCP/IP stack of the event
411  flag = osSetEventFromIsr(&netEvent);
412  }
413 
414  //Interrupt service routine epilogue
415  osExitIsr(flag);
416 }
417 
418 
419 /**
420  * @brief Ethernet MAC error interrupt
421  **/
422 
424 {
425  bool_t flag;
426 
427  //Interrupt service routine prologue
428  osEnterIsr();
429 
430  //This flag will be set if a higher priority task must be woken
431  flag = FALSE;
432 
433  //System bus error?
434  if(ENET_0->EIR & ENET_EIR_EBERR_MASK)
435  {
436  //Disable EBERR interrupt
437  ENET_0->EIMR &= ~ENET_EIMR_EBERR_MASK;
438 
439  //Set event flag
440  nicDriverInterface->nicEvent = TRUE;
441  //Notify the TCP/IP stack of the event
442  flag |= osSetEventFromIsr(&netEvent);
443  }
444 
445  //Interrupt service routine epilogue
446  osExitIsr(flag);
447 }
448 
449 
450 /**
451  * @brief MPC57xx Ethernet MAC event handler
452  * @param[in] interface Underlying network interface
453  **/
454 
456 {
457  error_t error;
458  uint32_t status;
459 
460  //Read interrupt event register
461  status = ENET_0->EIR;
462 
463  //Packet received?
464  if(status & ENET_EIR_RXF_MASK)
465  {
466  //Clear RXF interrupt flag
467  ENET_0->EIR = ENET_EIR_RXF_MASK;
468 
469  //Process all pending packets
470  do
471  {
472  //Read incoming packet
473  error = mpc57xxEthReceivePacket(interface);
474 
475  //No more data in the receive buffer?
476  } while(error != ERROR_BUFFER_EMPTY);
477  }
478 
479  //System bus error?
480  if(status & ENET_EIR_EBERR_MASK)
481  {
482  //Clear EBERR interrupt flag
483  ENET_0->EIR = ENET_EIR_EBERR_MASK;
484 
485  //Disable Ethernet MAC
486  ENET_0->ECR &= ~ENET_ECR_ETHEREN_MASK;
487  //Reset buffer descriptors
488  mpc57xxEthInitBufferDesc(interface);
489  //Resume normal operation
490  ENET_0->ECR |= ENET_ECR_ETHEREN_MASK;
491  //Instruct the DMA to poll the receive descriptor list
492  ENET_0->RDAR = ENET_RDAR_RDAR_MASK;
493  }
494 
495  //Re-enable Ethernet MAC interrupts
496  ENET_0->EIMR = ENET_EIMR_TXF_MASK | ENET_EIMR_RXF_MASK | ENET_EIMR_EBERR_MASK;
497 }
498 
499 
500 /**
501  * @brief Send a packet
502  * @param[in] interface Underlying network interface
503  * @param[in] buffer Multi-part buffer containing the data to send
504  * @param[in] offset Offset to the first data byte
505  * @return Error code
506  **/
507 
509  const NetBuffer *buffer, size_t offset)
510 {
511  size_t length;
512 
513  //Retrieve the length of the packet
514  length = netBufferGetLength(buffer) - offset;
515 
516  //Check the frame length
518  {
519  //The transmitter can accept another packet
520  osSetEvent(&interface->nicTxEvent);
521  //Report an error
522  return ERROR_INVALID_LENGTH;
523  }
524 
525  //Make sure the current buffer is available for writing
526  if(txBufferDesc[txBufferIndex][0] & ENET_TBD0_R)
527  return ERROR_FAILURE;
528 
529  //Copy user data to the transmit buffer
530  netBufferRead(txBuffer[txBufferIndex], buffer, offset, length);
531 
532  //Clear BDU flag
533  txBufferDesc[txBufferIndex][4] = 0;
534 
535  //Check current index
536  if(txBufferIndex < (MPC57XX_ETH_TX_BUFFER_COUNT - 1))
537  {
538  //Give the ownership of the descriptor to the DMA engine
539  txBufferDesc[txBufferIndex][0] = ENET_TBD0_R | ENET_TBD0_L |
541 
542  //Point to the next buffer
543  txBufferIndex++;
544  }
545  else
546  {
547  //Give the ownership of the descriptor to the DMA engine
548  txBufferDesc[txBufferIndex][0] = ENET_TBD0_R | ENET_TBD0_W |
550 
551  //Wrap around
552  txBufferIndex = 0;
553  }
554 
555  //Instruct the DMA to poll the transmit descriptor list
556  ENET_0->TDAR = ENET_TDAR_TDAR_MASK;
557 
558  //Check whether the next buffer is available for writing
559  if(!(txBufferDesc[txBufferIndex][0] & ENET_TBD0_R))
560  {
561  //The transmitter can accept another packet
562  osSetEvent(&interface->nicTxEvent);
563  }
564 
565  //Successful processing
566  return NO_ERROR;
567 }
568 
569 
570 /**
571  * @brief Receive a packet
572  * @param[in] interface Underlying network interface
573  * @return Error code
574  **/
575 
577 {
578  error_t error;
579  size_t n;
580 
581  //Make sure the current buffer is available for reading
582  if(!(rxBufferDesc[rxBufferIndex][0] & ENET_RBD0_E))
583  {
584  //The frame should not span multiple buffers
585  if(rxBufferDesc[rxBufferIndex][0] & ENET_RBD0_L)
586  {
587  //Check whether an error occurred
588  if(!(rxBufferDesc[rxBufferIndex][0] & (ENET_RBD0_LG |
590  {
591  //Retrieve the length of the frame
592  n = rxBufferDesc[rxBufferIndex][0] & ENET_RBD0_DATA_LENGTH;
593  //Limit the number of data to read
595 
596  //Pass the packet to the upper layer
597  nicProcessPacket(interface, rxBuffer[rxBufferIndex], n);
598 
599  //Valid packet received
600  error = NO_ERROR;
601  }
602  else
603  {
604  //The received packet contains an error
605  error = ERROR_INVALID_PACKET;
606  }
607  }
608  else
609  {
610  //The packet is not valid
611  error = ERROR_INVALID_PACKET;
612  }
613 
614  //Clear BDU flag
615  rxBufferDesc[rxBufferIndex][4] = 0;
616 
617  //Check current index
618  if(rxBufferIndex < (MPC57XX_ETH_RX_BUFFER_COUNT - 1))
619  {
620  //Give the ownership of the descriptor back to the DMA engine
621  rxBufferDesc[rxBufferIndex][0] = ENET_RBD0_E;
622  //Point to the next buffer
623  rxBufferIndex++;
624  }
625  else
626  {
627  //Give the ownership of the descriptor back to the DMA engine
628  rxBufferDesc[rxBufferIndex][0] = ENET_RBD0_E | ENET_RBD0_W;
629  //Wrap around
630  rxBufferIndex = 0;
631  }
632 
633  //Instruct the DMA to poll the receive descriptor list
634  ENET_0->RDAR = ENET_RDAR_RDAR_MASK;
635  }
636  else
637  {
638  //No more data in the receive buffer
639  error = ERROR_BUFFER_EMPTY;
640  }
641 
642  //Return status code
643  return error;
644 }
645 
646 
647 /**
648  * @brief Configure MAC address filtering
649  * @param[in] interface Underlying network interface
650  * @return Error code
651  **/
652 
654 {
655  uint_t i;
656  uint_t k;
657  uint32_t crc;
658  uint32_t value;
659  uint32_t unicastHashTable[2];
660  uint32_t multicastHashTable[2];
661  MacFilterEntry *entry;
662 
663  //Debug message
664  TRACE_DEBUG("Updating MAC filter...\r\n");
665 
666  //Set the MAC address of the station (upper 16 bits)
667  value = interface->macAddr.b[5];
668  value |= (interface->macAddr.b[4] << 8);
669  ENET_0->PAUR = ENET_PAUR_PADDR2(value) | ENET_PAUR_TYPE(0x8808);
670 
671  //Set the MAC address of the station (lower 32 bits)
672  value = interface->macAddr.b[3];
673  value |= (interface->macAddr.b[2] << 8);
674  value |= (interface->macAddr.b[1] << 16);
675  value |= (interface->macAddr.b[0] << 24);
676  ENET_0->PALR = ENET_PALR_PADDR1(value);
677 
678  //Clear hash table (unicast address filtering)
679  unicastHashTable[0] = 0;
680  unicastHashTable[1] = 0;
681 
682  //Clear hash table (multicast address filtering)
683  multicastHashTable[0] = 0;
684  multicastHashTable[1] = 0;
685 
686  //The MAC address filter contains the list of MAC addresses to accept
687  //when receiving an Ethernet frame
688  for(i = 0; i < MAC_ADDR_FILTER_SIZE; i++)
689  {
690  //Point to the current entry
691  entry = &interface->macAddrFilter[i];
692 
693  //Valid entry?
694  if(entry->refCount > 0)
695  {
696  //Compute CRC over the current MAC address
697  crc = mpc57xxEthCalcCrc(&entry->addr, sizeof(MacAddr));
698 
699  //The upper 6 bits in the CRC register are used to index the
700  //contents of the hash table
701  k = (crc >> 26) & 0x3F;
702 
703  //Multicast address?
704  if(macIsMulticastAddr(&entry->addr))
705  {
706  //Update the multicast hash table
707  multicastHashTable[k / 32] |= (1 << (k % 32));
708  }
709  else
710  {
711  //Update the unicast hash table
712  unicastHashTable[k / 32] |= (1 << (k % 32));
713  }
714  }
715  }
716 
717  //Write the hash table (unicast address filtering)
718  ENET_0->IALR = unicastHashTable[0];
719  ENET_0->IAUR = unicastHashTable[1];
720 
721  //Write the hash table (multicast address filtering)
722  ENET_0->GALR = multicastHashTable[0];
723  ENET_0->GAUR = multicastHashTable[1];
724 
725  //Debug message
726  TRACE_DEBUG(" IALR = %08" PRIX32 "\r\n", ENET_0->IALR);
727  TRACE_DEBUG(" IAUR = %08" PRIX32 "\r\n", ENET_0->IAUR);
728  TRACE_DEBUG(" GALR = %08" PRIX32 "\r\n", ENET_0->GALR);
729  TRACE_DEBUG(" GAUR = %08" PRIX32 "\r\n", ENET_0->GAUR);
730 
731  //Successful processing
732  return NO_ERROR;
733 }
734 
735 
736 /**
737  * @brief Adjust MAC configuration parameters for proper operation
738  * @param[in] interface Underlying network interface
739  * @return Error code
740  **/
741 
743 {
744  //Disable Ethernet MAC while modifying configuration registers
745  ENET_0->ECR &= ~ENET_ECR_ETHEREN_MASK;
746 
747  //10BASE-T or 100BASE-TX operation mode?
748  if(interface->linkSpeed == NIC_LINK_SPEED_100MBPS)
749  {
750  //100 Mbps operation
751  ENET_0->RCR &= ~ENET_RCR_RMII_10T_MASK;
752  }
753  else
754  {
755  //10 Mbps operation
756  ENET_0->RCR |= ENET_RCR_RMII_10T_MASK;
757  }
758 
759  //Half-duplex or full-duplex mode?
760  if(interface->duplexMode == NIC_FULL_DUPLEX_MODE)
761  {
762  //Full-duplex mode
763  ENET_0->TCR |= ENET_TCR_FDEN_MASK;
764  //Receive path operates independently of transmit
765  ENET_0->RCR &= ~ENET_RCR_DRT_MASK;
766  }
767  else
768  {
769  //Half-duplex mode
770  ENET_0->TCR &= ~ENET_TCR_FDEN_MASK;
771  //Disable reception of frames while transmitting
772  ENET_0->RCR |= ENET_RCR_DRT_MASK;
773  }
774 
775  //Reset buffer descriptors
776  mpc57xxEthInitBufferDesc(interface);
777 
778  //Re-enable Ethernet MAC
779  ENET_0->ECR |= ENET_ECR_ETHEREN_MASK;
780  //Instruct the DMA to poll the receive descriptor list
781  ENET_0->RDAR = ENET_RDAR_RDAR_MASK;
782 
783  //Successful processing
784  return NO_ERROR;
785 }
786 
787 
788 /**
789  * @brief Write PHY register
790  * @param[in] opcode Access type (2 bits)
791  * @param[in] phyAddr PHY address (5 bits)
792  * @param[in] regAddr Register address (5 bits)
793  * @param[in] data Register value
794  **/
795 
796 void mpc57xxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
797  uint8_t regAddr, uint16_t data)
798 {
799  uint32_t temp;
800 
801  //Valid opcode?
802  if(opcode == SMI_OPCODE_WRITE)
803  {
804  //Set up a write operation
805  temp = ENET_MMFR_ST(1) | ENET_MMFR_OP(1) | ENET_MMFR_TA(2);
806  //PHY address
807  temp |= ENET_MMFR_PA(phyAddr);
808  //Register address
809  temp |= ENET_MMFR_RA(regAddr);
810  //Register value
811  temp |= ENET_MMFR_DATA(data);
812 
813  //Clear MII interrupt flag
814  ENET_0->EIR = ENET_EIR_MII_MASK;
815  //Start a write operation
816  ENET_0->MMFR = temp;
817 
818  //Wait for the write to complete
819  while(!(ENET_0->EIR & ENET_EIR_MII_MASK))
820  {
821  }
822  }
823  else
824  {
825  //The MAC peripheral only supports standard Clause 22 opcodes
826  }
827 }
828 
829 
830 /**
831  * @brief Read PHY register
832  * @param[in] opcode Access type (2 bits)
833  * @param[in] phyAddr PHY address (5 bits)
834  * @param[in] regAddr Register address (5 bits)
835  * @return Register value
836  **/
837 
838 uint16_t mpc57xxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
839  uint8_t regAddr)
840 {
841  uint16_t data;
842  uint32_t temp;
843 
844  //Valid opcode?
845  if(opcode == SMI_OPCODE_READ)
846  {
847  //Set up a read operation
848  temp = ENET_MMFR_ST(1) | ENET_MMFR_OP(2) | ENET_MMFR_TA(2);
849  //PHY address
850  temp |= ENET_MMFR_PA(phyAddr);
851  //Register address
852  temp |= ENET_MMFR_RA(regAddr);
853 
854  //Clear MII interrupt flag
855  ENET_0->EIR = ENET_EIR_MII_MASK;
856  //Start a read operation
857  ENET_0->MMFR = temp;
858 
859  //Wait for the read to complete
860  while(!(ENET_0->EIR & ENET_EIR_MII_MASK))
861  {
862  }
863 
864  //Get register value
865  data = ENET_0->MMFR & ENET_MMFR_DATA_MASK;
866  }
867  else
868  {
869  //The MAC peripheral only supports standard Clause 22 opcodes
870  data = 0;
871  }
872 
873  //Return the value of the PHY register
874  return data;
875 }
876 
877 
878 /**
879  * @brief CRC calculation
880  * @param[in] data Pointer to the data over which to calculate the CRC
881  * @param[in] length Number of bytes to process
882  * @return Resulting CRC value
883  **/
884 
885 uint32_t mpc57xxEthCalcCrc(const void *data, size_t length)
886 {
887  uint_t i;
888  uint_t j;
889 
890  //Point to the data over which to calculate the CRC
891  const uint8_t *p = (uint8_t *) data;
892  //CRC preset value
893  uint32_t crc = 0xFFFFFFFF;
894 
895  //Loop through data
896  for(i = 0; i < length; i++)
897  {
898  //Update CRC value
899  crc ^= p[i];
900  //The message is processed bit by bit
901  for(j = 0; j < 8; j++)
902  {
903  if(crc & 0x00000001)
904  crc = (crc >> 1) ^ 0xEDB88320;
905  else
906  crc = crc >> 1;
907  }
908  }
909 
910  //Return CRC value
911  return crc;
912 }
bool_t osSetEventFromIsr(OsEvent *event)
Set an event object to the signaled state from an interrupt service routine.
uint8_t length
Definition: dtls_misc.h:149
uint8_t opcode
Definition: dns_common.h:172
int bool_t
Definition: compiler_port.h:49
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:119
#define ENET_TBD0_L
size_t netBufferRead(void *dest, const NetBuffer *src, size_t srcOffset, size_t length)
Read data from a multi-part buffer.
Definition: net_mem.c:672
void mpc57xxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
#define ENET_RBD0_DATA_LENGTH
uint8_t p
Definition: ndp.h:298
void nicProcessPacket(NetInterface *interface, uint8_t *packet, size_t length)
Handle a packet received by the network controller.
Definition: nic.c:383
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:88
#define MAC_ADDR_FILTER_SIZE
Definition: ethernet.h:74
#define TRUE
Definition: os_port.h:50
void mpc57xxEthInitGpio(NetInterface *interface)
uint_t refCount
Reference count for the current entry.
Definition: ethernet.h:223
void mpc57xxEthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
#define ENET_TBD0_DATA_LENGTH
#define MPC57XX_ETH_TX_BUFFER_SIZE
#define ENET_TBD0_W
#define ENET_TBD0_TC
uint16_t mpc57xxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
#define macIsMulticastAddr(macAddr)
Definition: ethernet.h:110
#define osExitIsr(flag)
#define SMI_OPCODE_WRITE
Definition: nic.h:62
void ENET0_Rx_IRQHandler(void)
Ethernet MAC receive interrupt.
void ENET0_Err_IRQHandler(void)
Ethernet MAC error interrupt.
#define ENET_RBD0_L
void mpc57xxEthEnableIrq(NetInterface *interface)
Enable interrupts.
#define FALSE
Definition: os_port.h:46
uint32_t mpc57xxEthCalcCrc(const void *data, size_t length)
CRC calculation.
error_t
Error codes.
Definition: error.h:42
void mpc57xxEthDisableIrq(NetInterface *interface)
Disable interrupts.
@ ERROR_FAILURE
Generic error code.
Definition: error.h:45
NXP MPC57xx Ethernet MAC controller.
#define txBuffer
@ ERROR_INVALID_PACKET
Definition: error.h:138
#define MPC57XX_ETH_RX_BUFFER_SIZE
#define NetInterface
Definition: net.h:36
MacAddr addr
MAC address.
Definition: ethernet.h:222
@ ERROR_INVALID_LENGTH
Definition: error.h:109
#define ENET_RBD0_W
@ ERROR_BUFFER_EMPTY
Definition: error.h:139
#define ENET_RBD0_TR
OsEvent netEvent
Definition: net.c:77
#define SMI_OPCODE_READ
Definition: nic.h:63
#define TRACE_INFO(...)
Definition: debug.h:94
size_t netBufferGetLength(const NetBuffer *buffer)
Get the actual length of a multi-part buffer.
Definition: net_mem.c:297
#define MIN(a, b)
Definition: os_port.h:62
error_t mpc57xxEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
#define rxBuffer
#define ENET_RBD0_LG
void mpc57xxEthEventHandler(NetInterface *interface)
MPC57xx Ethernet MAC event handler.
#define TRACE_DEBUG(...)
Definition: debug.h:106
error_t mpc57xxEthReceivePacket(NetInterface *interface)
Receive a packet.
uint16_t regAddr
#define ENET_RBD0_CR
#define ENET_RBD0_OV
void mpc57xxEthTick(NetInterface *interface)
MPC57xx Ethernet MAC timer handler.
#define ETH_MTU
Definition: ethernet.h:91
uint8_t n
MAC filter table entry.
Definition: ethernet.h:220
#define MPC57XX_ETH_TX_BUFFER_COUNT
#define osEnterIsr()
#define ENET_TBD0_R
#define ENET_TBD2_INT
#define ENET_RBD0_E
#define MPC57XX_ETH_IRQ_PRIORITY
Ipv6Addr address
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
error_t mpc57xxEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
const NicDriver mpc57xxEthDriver
MPC57xx Ethernet MAC driver.
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:106
error_t mpc57xxEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset)
Send a packet.
uint8_t value[]
Definition: dtls_misc.h:150
void ENET0_Tx_IRQHandler(void)
Ethernet MAC transmit interrupt.
unsigned int uint_t
Definition: compiler_port.h:45
TCP/IP stack core.
uint8_t data[]
Definition: dtls_misc.h:176
NIC driver.
Definition: nic.h:179
error_t mpc57xxEthInit(NetInterface *interface)
MPC57xx Ethernet MAC initialization.
#define ENET_RBD0_NO
#define ENET_RBD2_INT
#define MPC57XX_ETH_RX_BUFFER_COUNT
@ NO_ERROR
Success.
Definition: error.h:44
__attribute__((naked))
AVR32 Ethernet MAC interrupt wrapper.
Debugging facilities.
__start_packed struct @108 MacAddr
MAC address.
@ NIC_TYPE_ETHERNET
Ethernet interface.
Definition: nic.h:79