32 #define TRACE_LEVEL NIC_TRACE_LEVEL
35 #if defined(_TMS570LC43x_)
36 #include "hl_hw_reg_access.h"
37 #include "hl_hw_emac.h"
38 #include "hl_hw_emac_ctrl.h"
39 #include "hl_hw_mdio.h"
41 #include "hl_sys_vim.h"
43 #include "hw_reg_access.h"
45 #include "hw_emac_ctrl.h"
57 #define MDIO_INPUT_CLK 75000000
59 #define MDIO_OUTPUT_CLK 1000000
62 #if defined(_TMS570LC43x_)
63 #define CPPI_SWAP(x) swapInt32((uint32_t) (x))
65 #define CPPI_SWAP(x) ((uint32_t) (x))
72 #if defined(__ICCARM__)
75 #pragma data_alignment = 4
76 #pragma location = TMS570_ETH_RAM_SECTION
79 #pragma data_alignment = 4
80 #pragma location = TMS570_ETH_RAM_SECTION
83 #pragma data_alignment = 4
84 #pragma location = TMS570_ETH_RAM_CPPI_SECTION
87 #pragma data_alignment = 4
88 #pragma location = TMS570_ETH_RAM_CPPI_SECTION
153 TRACE_INFO(
"Initializing TMS570 Ethernet MAC...\r\n");
156 nicDriverInterface = interface;
180 MDIO_CONTROL_FAULTENB | (temp & MDIO_CONTROL_CLKDIV);
183 if(interface->phyDriver != NULL)
186 error = interface->phyDriver->init(interface);
188 else if(interface->switchDriver != NULL)
191 error = interface->switchDriver->init(interface);
225 (interface->macAddr.b[1] << 8) |
226 (interface->macAddr.b[2] << 16) |
227 (interface->macAddr.b[3] << 24);
231 (interface->macAddr.b[5] << 8);
238 (interface->macAddr.b[1] << 8) |
239 (interface->macAddr.b[2] << 16) |
240 (interface->macAddr.b[3] << 24);
243 temp = interface->macAddr.b[4] |
244 (interface->macAddr.b[5] << 8);
248 (
EMAC_CH0 << EMAC_MACADDRLO_CHANNEL_SHIFT) | temp;
278 (
EMAC_CH0 << EMAC_RXMBPENABLE_RXBROADCH_SHIFT);
282 (
EMAC_CH0 << EMAC_RXMBPENABLE_RXMULTCH_SHIFT);
333 #if defined(USE_LAUNCHXL2_570LC43)
335 gioPORTA->DIR &= ~(1 << 3);
336 gioPORTA->PSL |= (1 << 3);
337 gioPORTA->PULDIS &= ~(1 << 3);
340 gioPORTA->DIR |= (1 << 4);
341 gioPORTA->PDR &= ~(1 << 4);
344 gioPORTA->DCLR = (1 << 4);
346 gioPORTA->DSET = (1 << 4);
381 txBufferDesc[i].
next = &txBufferDesc[nextIndex];
382 txBufferDesc[i].
prev = &txBufferDesc[prevIndex];
386 txCurBufferDesc = &txBufferDesc[0];
410 rxBufferDesc[i].
next = &rxBufferDesc[nextIndex];
411 rxBufferDesc[i].
prev = &rxBufferDesc[prevIndex];
415 rxCurBufferDesc = &rxBufferDesc[0];
434 if(interface->phyDriver != NULL)
437 interface->phyDriver->tick(interface);
439 else if(interface->switchDriver != NULL)
442 interface->switchDriver->tick(interface);
475 if(interface->phyDriver != NULL)
478 interface->phyDriver->enableIrq(interface);
480 else if(interface->switchDriver != NULL)
483 interface->switchDriver->enableIrq(interface);
504 if(interface->phyDriver != NULL)
507 interface->phyDriver->disableIrq(interface);
509 else if(interface->switchDriver != NULL)
512 interface->switchDriver->disableIrq(interface);
525 #if defined(__ICCARM__)
528 #pragma CODE_STATE(tms570EthTxIrqHandler, 32)
529 #pragma INTERRUPT(tms570EthTxIrqHandler, IRQ)
594 #if defined(__ICCARM__)
597 #pragma CODE_STATE(tms570EthRxIrqHandler, 32)
598 #pragma INTERRUPT(tms570EthRxIrqHandler, IRQ)
622 nicDriverInterface->nicEvent =
TRUE;
726 txCurBufferDesc = txCurBufferDesc->
next;
813 rxCurBufferDesc = rxCurBufferDesc->
next;
849 uint32_t hashTable[2];
864 entry = &interface->macAddrFilter[i];
873 k = (
p[0] >> 2) ^ (
p[0] << 4);
874 k ^= (
p[1] >> 4) ^ (
p[1] << 2);
875 k ^= (
p[2] >> 6) ^
p[2];
876 k ^= (
p[3] >> 2) ^ (
p[3] << 4);
877 k ^= (
p[4] >> 4) ^ (
p[4] << 2);
878 k ^= (
p[5] >> 6) ^
p[5];
884 hashTable[k / 32] |= (1 << (k % 32));
917 config |= EMAC_MACCONTROL_RMIISPEED;
921 config &= ~EMAC_MACCONTROL_RMIISPEED;
927 config |= EMAC_MACCONTROL_FULLDUPLEX;
931 config &= ~EMAC_MACCONTROL_FULLDUPLEX;
959 temp = MDIO_USERACCESS0_GO | MDIO_USERACCESS0_WRITE;
961 temp |= (phyAddr << MDIO_USERACCESS0_PHYADR_SHIFT) & MDIO_USERACCESS0_PHYADR;
963 temp |= (
regAddr << MDIO_USERACCESS0_REGADR_SHIFT) & MDIO_USERACCESS0_REGADR;
965 temp |=
data & MDIO_USERACCESS0_DATA;
999 temp = MDIO_USERACCESS0_GO | MDIO_USERACCESS0_READ;
1001 temp |= (phyAddr << MDIO_USERACCESS0_PHYADR_SHIFT) & MDIO_USERACCESS0_PHYADR;
1003 temp |= (
regAddr << MDIO_USERACCESS0_REGADR_SHIFT) & MDIO_USERACCESS0_REGADR;
__attribute__((naked))
AVR32 Ethernet MAC interrupt wrapper.
@ ERROR_FAILURE
Generic error code.
#define MAC_ADDR_FILTER_SIZE
size_t netBufferGetLength(const NetBuffer *buffer)
Get the actual length of a multi-part buffer.
size_t netBufferRead(void *dest, const NetBuffer *src, size_t srcOffset, size_t length)
Read data from a multi-part buffer.
const NetRxAncillary NET_DEFAULT_RX_ANCILLARY
void nicProcessPacket(NetInterface *interface, uint8_t *packet, size_t length, NetRxAncillary *ancillary)
Handle a packet received by the network controller.
@ NIC_TYPE_ETHERNET
Ethernet interface.
#define EMAC_CTRL_C0RXSTAT_R
#define EMAC_TX_WORD3_EOQ
#define EMAC_MACEOIVECTOR_C0TX
#define EMAC_RX_WORD3_SOP
#define EMAC_TX_WORD2_BUFFER_LENGTH
#define EMAC_RX_WORD3_PACKET_LENGTH
#define EMAC_RXMBPENABLE_R
#define EMAC_RX_WORD3_OWNER
#define EMAC_TX_WORD3_OWNER
#define EMAC_RXINTMASKSET_R
#define MDIO_USERACCESS0_R
#define EMAC_RXBUFFEROFFSET_R
#define EMAC_TXINTMASKSET_R
#define EMAC_RXUNICASTSET_R
#define EMAC_CTRL_CnRXEN_R(n)
#define EMAC_TX_WORD3_EOP
#define EMAC_RX_WORD3_ERROR_MASK
#define EMAC_CTRL_CnTXEN_R(n)
#define EMAC_TXINTMASKCLEAR_R
#define EMAC_RX_WORD3_EOP
#define EMAC_MACSRCADDRHI_R
#define EMAC_TX_WORD3_PACKET_LENGTH
#define EMAC_MACEOIVECTOR_C0RX
#define EMAC_CTRL_C0TXSTAT_R
#define EMAC_RXINTMASKCLEAR_R
#define EMAC_RXUNICASTCLEAR_R
#define EMAC_MACEOIVECTOR_R
#define EMAC_CTRL_SOFTRESET_R
#define EMAC_RX_WORD3_EOQ
#define EMAC_TX_WORD3_SOP
#define EMAC_MACSRCADDRLO_R
#define EMAC_MACCONTROL_R
#define osMemcpy(dest, src, length)
bool_t osSetEventFromIsr(OsEvent *event)
Set an event object to the signaled state from an interrupt service routine.
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
struct _Tms570RxBufferDesc * prev
struct _Tms570RxBufferDesc * next
struct _Tms570TxBufferDesc * next
struct _Tms570TxBufferDesc * prev
uint_t refCount
Reference count for the current entry.
Structure describing a buffer that spans multiple chunks.
__weak_func void tms570EthInitGpio(NetInterface *interface)
GPIO configuration.
error_t tms570EthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
void tms570EthEventHandler(NetInterface *interface)
TMS570 Ethernet MAC event handler.
error_t tms570EthReceivePacket(NetInterface *interface)
Receive a packet.
error_t tms570EthInit(NetInterface *interface)
TMS570 Ethernet MAC initialization.
error_t tms570EthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
uint16_t tms570EthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void tms570EthRxIrqHandler(void)
Ethernet MAC receive interrupt.
void tms570EthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
void tms570EthTxIrqHandler(void)
Ethernet MAC transmit interrupt.
const NicDriver tms570EthDriver
TMS570 Ethernet MAC driver.
void tms570EthEnableIrq(NetInterface *interface)
Enable interrupts.
void tms570EthTick(NetInterface *interface)
TMS570 Ethernet MAC timer handler.
void tms570EthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptor lists.
error_t tms570EthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
void tms570EthDisableIrq(NetInterface *interface)
Disable interrupts.
TMS570 Ethernet MAC driver.
#define TMS570_ETH_TX_BUFFER_SIZE
#define TMS570_ETH_TX_IRQ_CHANNEL
#define TMS570_ETH_RX_IRQ_CHANNEL
#define TMS570_ETH_RAM_SECTION
#define TMS570_ETH_RX_BUFFER_COUNT
#define TMS570_ETH_TX_BUFFER_COUNT
#define TMS570_ETH_RX_BUFFER_SIZE
#define TMS570_ETH_RAM_CPPI_SECTION